LCMXO2-2000HC-4TG144C Lattice, LCMXO2-2000HC-4TG144C Datasheet - Page 5

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LCMXO2-2000HC-4TG144C

Manufacturer Part Number
LCMXO2-2000HC-4TG144C
Description
FPGA - Field Programmable Gate Array 2112 LUTs 112 IO 3.3V 4 Spd
Manufacturer
Lattice
Datasheet

Specifications of LCMXO2-2000HC-4TG144C

Rohs
yes
Number Of Gates
2 K
Embedded Block Ram - Ebr
74 Kbit
Number Of I/os
112
Maximum Operating Frequency
269 MHz
Operating Supply Voltage
1.14 V to 3.465 V, 2.375 V to 3.465 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
TQFP-144
Distributed Ram
16 Kbit
Minimum Operating Temperature
0 C
Operating Supply Current
4.8 mA
Factory Pack Quantity
60
User Flash Memory - Ufm
80 Kbit

Available stocks

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Part Number:
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0
2.0 LATTICE PRODUCT QUALIFICATION PROGRAM
Lattice Semiconductor Corp. maintains a comprehensive reliability qualification program to assure that each
product achieves its reliability goals. After initial qualification, the continued high reliability of Lattice products is
assured through ongoing monitor programs as described in Lattice Semiconductor’s Reliability Monitor Program
Procedure (Doc. #70-101667). All product qualification plans are generated in conformance with Lattice
Semiconductor’s Qualification Procedure (Doc. #70-100164) with failure analysis performed in conformance with
Lattice Semiconductor’s Failure Analysis Procedure (Doc. #70-100166). Both documents are referenced in
Lattice Semiconductor’s Quality Assurance Manual, which can be obtained upon request from a Lattice
Semiconductor sales office. Figure 2.1 shows the Product Qualification Process Flow.
If failures occur during qualification, an 8D process is used to find root cause and eliminate the failure mode
from the design, materials, or process. The effectiveness of any fix or change is validated through additional
testing as required. Final testing results are reported in the qualification reports.
Failure rates in this reliability report are expressed in FITs. Due to the very low failure rate of integrated circuits,
9
9
it is convenient to refer to failures in a population during a period of 10
device hours; one failure in 10
device
hours is defined as one FIT.
Product families are qualified based upon the requirements outlined in Table 2.2. In general, Lattice
Semiconductor follows the current Joint Electron Device Engineering Council (JEDEC) and Military Standard
testing methods. Lattice automotive products are qualified and characterized to the Automotive Electronics
Council (AEC) testing requirements and methods. Product family qualification will include products with a wide
range of circuit densities, package types, and package lead counts. Major changes to products, processes, or
vendors require additional qualification before implementation.
The MachXO2 family is the third generation FPGA product family and first 65 nm (CS200FL) Flash Technology
based product offering. The Lattice Semiconductor MachXO2 FPGA product family qualification efforts are
based on the first MachXO2 devices in the family per the Lattice Semiconductor Qualification Procedure,
doc#70-100164.
Lattice Semiconductor maintains a regular reliability monitor program. The current Lattice Reliability Monitor
Report can be found at
www.latticesemi.com/lit/docs/qa/product_reliability_monitor.pdf
.
INDEX Return
Lattice Semiconductor Corporation Doc. #25-106923 Rev. F
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