LCMXO2-256ZE-1SG32I Lattice, LCMXO2-256ZE-1SG32I Datasheet - Page 51

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LCMXO2-256ZE-1SG32I

Manufacturer Part Number
LCMXO2-256ZE-1SG32I
Description
FPGA - Field Programmable Gate Array 256 LUTs 22 I/O 1.2V -1 Speed
Manufacturer
Lattice
Datasheet

Specifications of LCMXO2-256ZE-1SG32I

Rohs
yes
Number Of Gates
256
Embedded Block Ram - Ebr
0 Kbit
Number Of I/os
22
Maximum Operating Frequency
104 MHz
Operating Supply Voltage
1.14 V to 1.26 V
Maximum Operating Temperature
+ 100 C
Mounting Style
SMD/SMT
Package / Case
QFN-32
Distributed Ram
2 Kbit
Operating Supply Current
18 uA
Factory Pack Quantity
490
LVPECL
The MachXO2 family supports the differential LVPECL standard through emulation. This output standard is emu-
lated using complementary LVCMOS outputs in conjunction with resistors across the driver outputs on all the
devices. The LVPECL input standard is supported by the LVDS differential input buffer. The scheme shown in Dif-
ferential LVPECL is one possible solution for point-to-point signals.
Figure 3-3. Differential LVPECL
Table 3-3. LVPECL DC Conditions
For further information on LVPECL, BLVDS and other differential interfaces please see details of additional techni-
cal documentation at the end of the data sheet.
16mA
16mA
Z
R
R
R
V
V
V
V
Z
I
1. For input buffer, see LVDS table.
DC
OUT
OH
OL
OD
BACK
T
CM
S
P
V
V
CCIO
CCIO
Symbol
On-chip
= 3.3V
= 3.3V
Output impedance
Driver series resistor
Driver parallel resistor
Receiver termination
Output high voltage
Output low voltage
Output differential voltage
Output common mode voltage
Back impedance
DC output current
Over Recommended Operating Conditions
1
Off-chip
93 ohms
93 ohms
Description
Transmission line, Zo = 100 ohm differential
196 ohms
3-12
Nominal
100.5
12.11
2.05
1.25
0.80
1.65
196
100
100 ohms
10
93
DC and Switching Characteristics
MachXO2 Family Data Sheet
Off-chip
Ohms
Ohms
Ohms
Ohms
Ohms
Units
mA
V
V
V
V
On-chip
+
-

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