LFE3-150EA-8LFN1156C Lattice, LFE3-150EA-8LFN1156C Datasheet - Page 59

• Manufacturer Part Number: LFE3-150EA-8LFN1156C
• Description: FPGA - Field Programmable Gate Array 149K LUTs 586 I/O 1.2V -8 SPEED
• Manufacturer: Lattice

Specifications of LFE3-150EA-8LFN1156C

• Rohs: yes
• Factory Pack Quantity: 24

sysI/O Recommended Operating Conditions
LVCMOS33
LVCMOS33D
LVCMOS25
LVCMOS18
LVCMOS15
LVCMOS12
LVTTL33
PCI33
SSTL15
SSTL18_I, II
SSTL25_I, II
SSTL33_I, II
HSTL15_I
HSTL18_I, II
LVDS25
LVDS25E
MLVDS
LVPECL33
Mini LVDS
BLVDS25
RSDS
RSDSE
TRLVDS
PPLVDS
SSTL15D
SSTL18D_I
SSTL25D_ I
SSTL33D_ I
HSTL15D_ I
HSTL18D_ I
1. Inputs on chip. Outputs are implemented with the addition of external resistors.
2. For input voltage compatibility, see TN1177,
3. VREF is required when using Differential SSTL to interface to DDR memory.
1, 2
1
1, 2
3
2
Standard
2
1, 2
3
2
1, 2
2, 3
2
2
2
2
2
2
2
2
2
2
2
, II
, II
, II
, II
2
2
2
2, 3
3.14/2.25
3.135
3.135
2.375
1.425
3.135
3.135
2.375
3.135
1.425
2.375
2.375
2.375
3.135
2.375
2.375
2.375
2.375
2.375
3.135
1.425
Min.
1.71
1.14
1.43
1.71
1.71
3.14
1.43
1.71
1.71
LatticeECP3 sysIO Usage
3.3/2.5
V
Typ.
3.3
3.3
2.5
1.8
1.5
1.2
3.3
3.3
1.5
1.8
2.5
3.3
1.5
1.8
2.5
2.5
2.5
3.3
2.5
2.5
2.5
2.5
3.3
1.5
1.8
2.5
3.3
1.5
1.8
CCIO
3-6
3.47/2.75
3.465
3.465
2.625
1.575
3.465
3.465
2.625
3.465
1.575
2.625
2.625
2.625
3.465
2.625
2.625
2.625
2.625
2.625
3.465
1.575
Guide.
Max.
1.89
1.26
1.57
1.89
1.89
3.47
1.57
1.89
1.89
DC and Switching Characteristics
LatticeECP3 Family Data Sheet
0.833
0.816
Min.
0.68
1.15
0.68
1.3
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
V
REF
Typ.
0.75
1.25
0.75
0.9
1.5
0.9
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
(V)
0.969
Max.
1.35
1.08
0.9
1.7
0.9
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—