iCE65L01F-LCB132C Lattice, iCE65L01F-LCB132C Datasheet - Page 39

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iCE65L01F-LCB132C

Manufacturer Part Number
iCE65L01F-LCB132C
Description
FPGA - Field Programmable Gate Array iCE65 1280 LUTs, 1.0 1.2V Ultra Low-Power
Manufacturer
Lattice
Datasheet

Specifications of iCE65L01F-LCB132C

Rohs
yes
Number Of Gates
1280
Number Of Logic Blocks
16
Number Of I/os
93
Maximum Operating Frequency
256 MHz
Operating Supply Voltage
1.2 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Package / Case
CBGA-132
Distributed Ram
64 Kbit
Minimum Operating Temperature
0 C
Operating Supply Current
12 uA
Factory Pack Quantity
384

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ICE65L01F-LCB132C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Package and Pinout Information
Lattice Semiconductor Corporation
www.latticesemi.com
Supported JTAG Commands
Maximum User I/O Pins by Package and by I/O Bank
Printed Circuit Board Layout Information
Maximum User I/O by Device and Package
The JTAG interface supports the IEEE 1149.1 mandatory instructions, including EXTEST, SAMPLE/PRELOAD, and
BYPASS.
Table 34
I/O pins by I/O bank. In some cases, a smaller iCE65 device is packaged in a larger package with unconnected (N.C.)
pins or balls, resulting in fewer overall I/O pins. See
For information on how to use the iCE65 packages on a printed circuit board (PCB) design, consult the following
application note.
Table 35
packages. Similarly, smaller iCE65 devices may have unconnected balls in some packages. Devices sharing a
common package have similar footprints.
Package Leads
Package Body
Ball Array (balls)
Ball/Lead Pitch
Maximum user I/O,
all I/O banks
PIO Pins in Bank 0
PIO Pins in Bank 1
PIO Pins in Bank 2
PIO Pins in Bank 3
PIO Pins in SPI
Interface
Package
VQ100
CB132
CB196
CB284
QN84
CB81
AN010: iCE65 Printed Circuit Board (PCB Layout) Guidelines
lists the maximum available user I/O by device and by and package type. Not all devices are available in all
lists the maximum number of user-programmable I/O pins by package, with additional detail showing user
(mm)
(mm)
Table 35:
iCE65L01
CB81
Table 34:
5 x 5
9 x 9
0.5
81
63
17
16
12
18
4
63
67
72
93
Maximum User I/O by Device and Package
User I/O by Package, by I/O Bank
QN84
7 x 7
N/A
0.5
84
67
17
17
11
18
4
Table 35
VQ100
14 x 14
100
N/A
0.5
72
19
19
12
18
for device-specific I/O counts by package.
iCE65L04
4
150
176
Device
72
95
CB132
14 x 14
8 x 8
132
0.5
95
26
21
20
24
4
CB196
14 x 14
8 x 8
196
150
0.5
37
38
35
36
4
(2.42, 30-MAR-2011)
iCE65L08
150
222
CB284
12 x 12
22 x 22
284
222
0.5
60
55
53
50
4
39

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