1893BFILFT IDT, 1893BFILFT Datasheet - Page 112

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1893BFILFT

Manufacturer Part Number
1893BFILFT
Description
Ethernet ICs 3.3V 10/100 BASE TX INTEGRATED PHYCEIVER
Manufacturer
IDT
Datasheet

Specifications of 1893BFILFT

Rohs
yes
Part # Aliases
ICS1893BFILFT
9.5.3 Timing for Receive Clock (RXCLK) Pins
ICS1893BF, Rev. F, 5/13/10
Table 9-10
interfaces.
Table 9-10. MII Receive Clock Timing
Figure 9-4. Receive Clock Timing Diagram
RXCLK
Period
Time
t2a
t2b
t1
ICS1893BF Data Sheet - Release
RXCLK Duty Cycle
RXCLK Period
RXCLK Period
Figure 9-4
lists the significant time periods for signals on the Receive Clock (RXCLK) pins for the various
Parameter
shows the timing diagram for the time periods.
t1
t2
100M MII (100Base-TX)
10M MII (10Base-T)
Copyright © 2009, IDT, Inc.
All rights reserved.
112
Conditions
Chapter 9 DC and AC Operating Conditions
Min. Typ. Max.
35
400
50
40
65
May, 2010
Units
ns
ns
%

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