MC10ELT20DG ON Semiconductor, MC10ELT20DG Datasheet

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MC10ELT20DG

Manufacturer Part Number
MC10ELT20DG
Description
IC XLATOR TTL-PECL DIFF 8SOIC
Manufacturer
ON Semiconductor
Series
10ELTr
Datasheet

Specifications of MC10ELT20DG

Logic Function
Translator
Number Of Bits
1
Input Type
TTL
Output Type
PECL
Number Of Channels
1
Number Of Outputs/channel
1
Differential - Input:output
No/Yes
Propagation Delay (max)
1.1ns
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Supply Voltage
4.75 V ~ 5.25 V
Logic Type
Translator
Logic Family
ECL
Translation
TTL to PECL
High Level Output Current
- 50 mA
Low Level Output Current
50 mA
Propagation Delay Time
1.25 ns @ 4.75 V to 5.25 V
Supply Voltage (max)
5.25 V
Supply Voltage (min)
4.75 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Rate
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
MC10ELT20DGOS

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC10ELT20DG
Manufacturer:
ON Semiconductor
Quantity:
73
MC10ELT20, MC100ELT20
5V TTL to Differential PECL
Translator
Description
Because PECL (Positive ECL) levels are used, only +5 V and ground
are required. The small outline 8-lead package and the single gate of
the ELT20 makes it ideal for those applications where space,
performance, and low power are at a premium.
Features
© Semiconductor Components Industries, LLC, 2008
August, 2008 − Rev. 6
The MC10ELT/100ELT20 is a TTL to differential PECL translator.
The 100 Series contains temperature compensation.
1.2 ns Typical Propagation Delay
PNP TTL Inputs for Minimal Loading
Flow Through Pinouts
Operating Range: V
Pb−Free Packages are Available
CC
= 4.75 V to 5.25 V with GND = 0 V
1
H
K
5B
2P
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
CASE 506AA
MN SUFFIX
CASE 948R
DT SUFFIX
CASE 751
D SUFFIX
TSSOP−8
*For additional marking information, refer to
8
(Note: Microdot may be in either location)
Application Note AND8002/D.
DFN8
8
SO−8
= MC10
= MC100
= MC10
= MC100
1
ORDERING INFORMATION
1
http://onsemi.com
8
1
8
1
A
L
Y
W
M
G
MARKING DIAGRAMS*
ALYWG
HT20
Publication Order Number:
1
HLT20
ALYW
G
= Date Code
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
4
8
1
MC10ELT20/D
8
1
KLT20
ALYW
ALYWG
1
KT20
G
G
4

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MC10ELT20DG Summary of contents

Page 1

MC10ELT20, MC100ELT20 5V TTL to Differential PECL Translator Description The MC10ELT/100ELT20 is a TTL to differential PECL translator. Because PECL (Positive ECL) levels are used, only +5 V and ground are required. The small outline 8-lead package and the single gate ...

Page 2

NC TTL 2 Q PECL Figure 1. 8−Lead Pinout (Top View) and Logic Diagram Table 2. ATTRIBUTES Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Moisture Sensitivity, Indefinite Time Out of Drypack (Note ...

Page 3

Table 4. 10ELT SERIES PECL DC CHARACTERISTICS Symbol Characteristic I Power Supply Current CC V Output HIGH Voltage (Note Output LOW Voltage (Note 4) OL NOTE: Device will meet the specifications after thermal equilibrium has been established ...

Page 4

Table 7. AC CHARACTERISTICS V Symbol Characteristic f Maximum Toggle Frequency max t Propagation Delay PLH 1 50% t Propagation Delay PHL 1 50% t Cycle−to−Cycle Jitter JITTER t /t Output Rise/Fall Time r f (20−80%) ...

Page 5

... ORDERING INFORMATION Device MC10ELT20D MC10ELT20DG MC10ELT20DR2 MC10ELT20DR2G MC10ELT20DT MC10ELT20DTG MC10ELT20DTR2 MC10ELT20DTR2G MC10ELT20MNR4 MC10ELT20MNR4G MC100ELT20D MC100ELT20DG MC100ELT20DR2 MC100ELT20DR2G MC100ELT20DT MC100ELT20DTG MC100ELT20DTR2 MC100ELT20DTR2G MC100ELT20MNR4 MC100ELT20MNR4G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D ...

Page 6

... G C SEATING PLANE −Z− 0.25 (0.010 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE 0.10 (0.004 SOLDERING FOOTPRINT* 1 ...

Page 7

K 8x REF 0.10 (0.004) 0.15 (0.006 L −U− PIN 1 IDENT 0.15 (0.006 −V− C 0.10 (0.004) D −T− G SEATING PLANE PACKAGE DIMENSIONS TSSOP−8 ...

Page 8

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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