ALD4701BSFL Advanced Linear Devices, ALD4701BSFL Datasheet - Page 4

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ALD4701BSFL

Manufacturer Part Number
ALD4701BSFL
Description
Operational Amplifiers - Op Amps 5.0mV Quad Prec CMOS
Manufacturer
Advanced Linear Devices
Datasheet

Specifications of ALD4701BSFL

Product Category
Operational Amplifiers - Op Amps
Rohs
yes
Number Of Channels
4
Common Mode Rejection Ratio (min)
65 dB
Input Offset Voltage
5 mV
Input Bias Current (max)
30 pA
Operating Supply Voltage
2 V to 10 V, +/- 1 V to +/- 5 V
Mounting Style
SMD/SMT
Package / Case
SOIC-24
Slew Rate
0.7 V/us
Shutdown
No
Output Current
1 mA
Maximum Operating Temperature
+ 70 C
Gain Bandwidth Product
0.7 MHz
Minimum Dual Supply Voltage
+/- 1 V
Minimum Operating Temperature
0 C
Factory Pack Quantity
50
Supply Current
1 mA
ALD4701A/ALD4701B
ALD4701
Design & Operating Notes:
1. The ALD4701A/ALD4701B/ALD4701 CMOS operational amplifier uses
2. The ALD4701A/ALD4701B/ALD4701 has complementary p-channel
3. The input bias and offset currents are essentially input protection diode
a 3 gain stage architecture and an improved frequency compensation
scheme to achieve large voltage gain, high output driving capability,
and better frequency stability. In a conventional CMOS operational
amplifier design, compensation is achieved with a pole splitting capaci-
tor together with a nulling resistor. This method is, however, very bias
dependent and thus cannot accommodate the large range of supply
voltage operation as is required from a stand alone CMOS operational
amplifier. The ALD4701A/ALD4701B/ALD4701 is internally compen-
sated for unity gain stability using a novel scheme that does not use a
nulling resistor. This scheme produces a clean single pole roll off in the
gain characteristics while providing for more than 70 degrees of phase
margin at the unity gain frequency.
and n-channel input differential stages connected in parallel to accom-
plish rail-to-rail input common mode voltage range. This means that
with the ranges of common mode input voltage close to the power
supplies, one of the two differential stages is switched off internally. To
maintain compatibility with other operational amplifiers, this switching
point has been selected to be about 1.5V below the positive supply
voltage. Since offset voltage trimming on the ALD4701A/ALD4701B/
ALD4701 is made when the input voltage is symmetrical to the supply
voltages, this internal switching does not affect a large variety of
applications such as an inverting amplifier or non-inverting amplifier
with a gain larger than 2.5 (5V operation), where the common mode
voltage does not make excursions above this switching point. The user
should however, be aware that this switching does take place if the
operational amplifier is connected as a unity gain buffer and should
make provision in his design to allow for input offset voltage variations.
reverse bias leakage currents, and are typically less than 1pA at room
1600
1200
800
400
1000
100
0
10
1
0
10K
SUPPLY CURRENT AS A FUNCTION
INPUTS GROUNDED
OUTPUT UNLOADED
OPEN LOOP VOLTAGE GAIN AS A
FUNCTION OF LOAD RESISTANCE
±1
OF SUPPLY VOLTAGE
T
A
SUPPLY VOLTAGE (V)
= -55°C
±2
100K
LOAD RESISTANCE (Ω)
TYPICAL PERFORMANCE CHARACTERISTICS
±3
-25°C
+70°C
+25°C
±4
1M
V
T
A
+125°C
S
= ±2.5V
= 25°C
±5
Advanced Linear Devices
10M
±6
4. The output stage consists of class AB complementary output drivers,
5. The ALD4701A/ALD4701B/ALD4701 operational amplifier has been
6. The ALD4701A/ALD4701B/ALD4701, with its micropower operation,
temperature. This low input bias current assures that the analog signal
from the source will not be distorted by input bias currents. Normally,
this extremely high input impedance of greater than 10
a problem as the source impedance would limit the node impedance.
However, for applications where source impedance is very high, it may
be necessary to limit noise and hum pickup through proper shielding.
capable of driving a low resistance load. The output voltage swing is
limited by the drain to source on-resistance of the output transistors as
determined by the bias circuitry, and the value of the load resistor.
When connected in the voltage follower configuration, the oscillation
resistant feature, combined with the rail to rail input and output feature,
makes an effective analog signal buffer for medium to high source
impedance sensors, transducers, and other circuit networks.
designed to provide full static discharge protection. Internally, the
design has been carefully implemented to minimize latch up. However,
care must be exercised when handling the device to avoid strong static
fields that may degrade a diode junction, causing increased input
leakage currents. In using the operational amplifier, the user is advised
to power up the circuit before, or simultaneously with, any input
voltages applied and to limit input voltages not to exceed 0.3V of the
power supply voltage levels.
offers numerous benefits in reduced power supply requirements, less
noise coupling and current spikes, less thermally induced drift, better
overall reliability due to lower self heating, and lower input bias current.
It requires practically no warm up time as the chip junction heats up to
only 0.4°C above ambient temperature under most operating condi-
tions.
10000
1000
100
1.0
0.1
±7
±6
±5
±4
±3
±2
±1
10
0
-50
COMMON MODE INPUT VOLTAGE RANGE
0
AS A FUNCTION OF SUPPLY VOLTAGE
INPUT BIAS CURRENT AS A FUNCTION
-25
±1
V
T
OF AMBIENT TEMPERATURE
S
A
= ±2.5V
= 25°C
AMBIENT TEMPERATURE (°C)
±2
0
SUPPLY VOLTAGE (V)
±3
25
±4
50
±5
75
±6
100
12
Ω would not be
±7
125
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