SLATA1GM2PU STEC, SLATA1GM2PU Datasheet - Page 26

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SLATA1GM2PU

Manufacturer Part Number
SLATA1GM2PU
Description
Memory Cards 1G 3.3-5V
Manufacturer
STEC
Datasheet

Specifications of SLATA1GM2PU

Product Category
Memory Cards
Rohs
yes
SLATAxxx(M/G)M1U(I)
Datasheet
8.
9.
10. 003E: Code 1B, link 08
11. 0048: Code 1B, link 06
0032: Code 22, link 03
02 0C 0F
Tuple CISTPL_FUNCE (22), length 3 (03) at offset 32
0037: Code 1A, link 05
01 03 00 02 0F
Tuple CISTPL_CONFIG (1A), length 5 (05) at offset 37
C0 C0 A1 01 55 08 00 20
Tuple CISTPL_CFTABLE_ENTRY (1B), length 8 (08) at offset 3E
00 01 21 B5 1E 4D
Tuple CISTPL_CFTABLE_ENTRY (1B), length 6 (06) at offset 48
Vpp is not required
This is a silicon device
Identify Drive Model/Serial Number is guaranteed unique
Low-Power Modes supported: Sleep Standby Idle
Drive automatically minimizes power
All modes include 3F7 or 377
Index bit is not supported
-IOIS16 is unspecified in Twin configurations
Last valid configuration index is 3
Configuration Register Base Address is 200
Configuration Registers Present:
Configuration Table Index is 00 (default)
Interface type is Memory
BVDs not active, WP not active, RdyBsy active
Wait signal support required
Vcc Power Description: Nom V = 5.0 V
Map 2048 bytes of memory to CF Card address 0
Miscellaneous Features: Max Twins 0, -Audio, -ReadOnly, +PowerDown
Configuration Table Index is 00
Vcc Power Description: Nom V = 3.30 V, Peak I = 45.0 mA
Configuration Option Register at 200
Card Configuration and Status Register at 202
Pin Replacement Register at 204
Socket and Copy Register at 206
61000-04497-117, April 2008
ATA PC Card
26

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