GLS85LS1032A-C-M-1S-K Greenliant, GLS85LS1032A-C-M-1S-K Datasheet - Page 2

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GLS85LS1032A-C-M-1S-K

Manufacturer Part Number
GLS85LS1032A-C-M-1S-K
Description
Solid State Drives - SSD 32GB MLC NANDrive EB SATA Connector
Manufacturer
Greenliant
Datasheet

Specifications of GLS85LS1032A-C-M-1S-K

Rohs
yes
1.0
Each SATA NANDrive contains an integrated SATA NAND flash memory controller and up to eight discrete
NAND flash die in a BGA package. Refer to Figure 2-1 for the SATA NANDrive block diagram.
1.1
The heart of the SATA NANDrive is the SATA NAND
flash memory controller which translates standard
SATA signals into flash media data and control
signals. The following components contribute to the
SATA NANDrive’s operation.
1.1.1
The MCU translates SATA commands into data and
control signals required for flash media operation.
1.1.2
The SATA NANDrive uses internal DMA allowing
instant data transfer from/to buffer to/from flash media.
This
overhead associated with the traditional, firmware-
based approach, thereby increasing the data transfer
rate.
1.1.3
The PMU controls the power consumption of the
SATA NANDrive. The PMU dramatically reduces the
power consumption of the SATA NANDrive by putting
the part of the circuitry that is not in operation into
sleep mode.
The Flash File System handles inadvertent power
interrupts and has auto-recovery capability to ensure
SATA NANDrive firmware integrity. For regular power
management,
IDLE_IMMEDIATE command and wait for command
ready before powering down the SATA NANDrive.
These specifications are subject to change without notice.
© 2012 Greenliant Systems
GLS85LS1004A / 1008A / 1016A / 1032A
Commercial Grade SATA NANDrive™
3)
implementation
GENERAL DESCRIPTION
Optimized SATA NANDrive
Microcontroller Unit (MCU)
Internal Direct Memory Access (DMA)
Power Management Unit (PMU)
For management of the Sleep Mode, please refer to
“SATA NANDrive Application Design Guide.”
3)
the
Host
eliminates
must
microcontroller
send
an
2
1.1.4
The embedded flash file system is an integral part of
the SATA NANDrive. It contains MCU firmware that
performs the following tasks:
1.1.5
High performance is achieved through optimized
hardware error detection and correction.
1.1.6
The Serial Communication Interface (SCI) is designed
for manufacturing error reporting. During the design
process, always provide access to the SCI port in the
PCB design to aid in design validation.
1.1.7
The multi-tasking interface enables fast, sustained
write performance by allowing concurrent Read,
Program and Erase operations to multiple flash media
and NAND flash die.
1.2
The SATA NANDrive family utilizes standard NAND
flash for data storage. Because the high temperature
in a surface-mount soldering reflow process may alter
the content on NAND flash, it is recommended to
program the SATA NANDrive after the reflow process.
1.3
Advanced NAND management technology balances
the wear on erased blocks with wear-leveling
algorithms. When the Host updates data, higher
priority is given to the less frequently written erase
blocks, thereby evenly distributing host writes within
the SATA NANDrive.
Advanced NAND management technology enhances
SATA NANDrive’s security with password protection
and four independent protection zones that can be set
to Read-only or Hidden.
1. Translates host side signals into flash media
2. Provides flash media wear leveling to spread the
3. Keeps track of data file structures
4. Manages system security for the selected
writes and reads
flash writes across all memory address space to
increase the longevity of flash media
protection zones
Embedded Flash File System
Error Correction Code (ECC)
Serial Communication Interface (SCI)
Multi-tasking Interface
SMT Reflow Consideration
Advanced NAND Management
Fact Sheet 01.004
May 2012
05/22/2012
S71429-F

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