AT28HC64B-90TU Atmel, AT28HC64B-90TU Datasheet

IC EEPROM 64KBIT 90NS 28TSOP

AT28HC64B-90TU

Manufacturer Part Number
AT28HC64B-90TU
Description
IC EEPROM 64KBIT 90NS 28TSOP
Manufacturer
Atmel
Datasheet

Specifications of AT28HC64B-90TU

Format - Memory
EEPROMs - Parallel
Memory Type
EEPROM
Memory Size
64K (8K x 8)
Speed
90ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
28-TSOP
Density
64Kb
Interface Type
Parallel
Organization
8Kx8
Access Time (max)
90ns
Write Protection
Yes
Data Retention
10Year
Operating Supply Voltage (typ)
5V
Package Type
TSOP-I
Operating Temp Range
-40C to 85C
Supply Current
40mA
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
28
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT28HC64B-90TU
Manufacturer:
ATMEL
Quantity:
200
Part Number:
AT28HC64B-90TU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Features
1. Description
The AT28HC64B is a high-performance electrically-erasable and programmable read-
only memory (EEPROM). Its 64K of memory is organized as 8,192 words by 8 bits.
Manufactured with Atmel’s advanced nonvolatile CMOS technology, the device offers
access times to 55 ns with power dissipation of just 220 mW. When the device is
deselected, the CMOS standby current is less than 100 µA.
The AT28HC64B is accessed like a Static RAM for the read or write cycle without the
need for external components. The device contains a 64-byte page register to allow
writing of up to 64 bytes simultaneously. During a write cycle, the addresses and 1 to
64 bytes of data are internally latched, freeing the address and data bus for other
operations. Following the initiation of a write cycle, the device will automatically write
the latched data using an internal control timer. The end of a write cycle can be
detected by DATA polling of I/O7. Once the end of a write cycle has been detected, a
new access for a read or write can begin.
Atmel’s AT28HC64B has additional features to ensure high quality and manufactura-
bility. The device utilizes internal error correction for extended endurance and
improved data retention characteristics. An optional software data protection mecha-
nism is available to guard against inadvertent writes. The device also includes an
extra 64 bytes of EEPROM for device identification or tracking.
Fast Read Access Time – 70 ns
Automatic Page Write Operation
Fast Write Cycle Times
Low Power Dissipation
Hardware and Software Data Protection
DATA Polling and Toggle Bit for End of Write Detection
High Reliability CMOS Technology
Single 5 V ±10% Supply
CMOS and TTL Compatible Inputs and Outputs
JEDEC Approved Byte-wide Pinout
Industrial Temperature Ranges
Green (Pb/Halide-free) Packaging Option Only
– Internal Address and Data Latches for 64 Bytes
– Page Write Cycle Time: 10 ms Maximum (Standard)
– 1 to 64-byte Page Write Operation
– 40 mA Active Current
– 100 µA CMOS Standby Current
– Endurance: 100,000 Cycles
– Data Retention: 10 Years
2 ms Maximum (Option – Ref. AT28HC64BF Datasheet)
64K (8K x 8)
High-speed
Parallel
EEPROM with
Page Write and
Software Data
Protection
AT28HC64B
0274L–PEEPR–2/3/09

Related parts for AT28HC64B-90TU

AT28HC64B-90TU Summary of contents

Page 1

... When the device is deselected, the CMOS standby current is less than 100 µA. The AT28HC64B is accessed like a Static RAM for the read or write cycle without the need for external components. The device contains a 64-byte page register to allow writing bytes simultaneously ...

Page 2

... SOIC Top View A12 GND 14 15 AT28HC64B 2 2.2 32-lead PLCC Top View Note: PLCC package pins 1 and 17 are Don’t Connect. 2.3 28-lead TSOP Top View VCC OE WE A11 A11 WE OE VCC A10 NC CE A12 I/O7 A7 I/O6 A6 I/O5 A5 I/ ...

Page 3

... Page Write The page write operation of the AT28HC64B allows bytes of data to be written into the device during a single internal programming period. A page write operation is initiated in the same manner as a byte write; after the first byte is written, it can then be followed additional bytes. Each successive byte must be loaded within 150 µ ...

Page 4

... Algorithm” diagram on the entire AT28HC64B will be protected against inadvertent writes. It should be noted that even after SDP is enabled, the user may still perform a byte or page write to the AT28HC64B. This is done by preceding the data to be written by the same 3-byte command sequence used to enable SDP ...

Page 5

... Exposure to absolute maximum rating conditions for extended periods may affect device reliability + 0 Condition MHz OUT -400 µA OH AT28HC64B-120 -40°C - 85° ±10 OUT High High Z V High Z IL Min Max Units 10 µA 10 µA (1) 100 µA ...

Page 6

... AT28HC64B-70 AT28HC64B-90 Min Max Min (1)(2)(3)(4) ADDRESS VALID ACC HIGH after the address transition without impact on t ACC after the falling edge of CE without impact pF). L AT28HC64B-120 Max Min Max 90 120 90 120 OUTPUT VALID . ACC after an address change CE ACC OE Units ...

Page 7

Input Test Waveforms and Measurement Level 12. Output Test Load 13. Pin Capacitance ( MHz 25°C Symbol Typ OUT Note: 1. This parameter is characterized and is not 100% ...

Page 8

... Chip Select Setup Time CS t Chip Select Hold Time CH t Write Pulse Width ( Data Setup Time Data, OE Hold Time DH OEH 15. AC Write Waveforms 15.1 WE Controlled OE ADDRESS CE WE DATA IN 15.2 CE Controlled OE ADDRESS WE CE DATA IN AT28HC64B 8 t OES OES Min Max 100 ...

Page 9

... Page Mode Characteristics Symbol Parameter t Write Cycle Time WC t Write Cycle Time (Use AT28HC64BF Address Setup Time AS t Address Hold Time AH t Data Setup Time DS t Data Hold Time DH t Write Pulse Width WP t Byte Load Cycle Time BLC t Write Pulse Width High WPH 17 ...

Page 10

... A6 - A12 DATA Notes through A12 must specify the same page address during each high to low transition of WE (or CE) after the software code has been entered must be high only when WE and CE are both low. AT28HC64B 10 20. Software Data Protection Disable Algorithm (2) Notes: ...

Page 11

Data Polling Characteristics Symbol Parameter t Data Hold Time Hold Time OEH ( Output Delay OE t Write Recovery Time WR Note: 1. These parameters are characterized and not 100% tested. 23. Data ...

Page 12

... Normalized I Graphs CC AT28HC64B 12 0274L–PEEPR–2/3/09 ...

Page 13

... Plastic Thin Small Outline Package (TSOP) 27.2 Die Products Contact Atmel Sales for die sales options. 0274L–PEEPR–2/3/09 Ordering Code Package AT28HC64B-70TU 28T AT28HC64B-70JU 32J AT28HC64B-70SU 28S AT28HC64B-90JU 32J AT28HC64B-90SU 28S AT28HC64B-90TU 28T AT28HC64B-12JU 32J AT28HC64B-12SU 28S Package Type Operation Range Industrial (-40°C to 85°C) 13 ...

Page 14

... Allowable protrusion is .010"(0.254 mm) per side. Dimension D1 and E1 include mold mismatch and are measured at the extreme material condition at the upper or lower parting line. 3. Lead coplanarity is 0.004" (0.102 mm) maximum. 2325 Orchard Parkway San Jose, CA 95131 R AT28HC64B 14 1.14(0.045) X 45˚ PIN NO. 1 IDENTIFIER E1 E ...

Page 15

SOIC Dimensions in Millimeters and (Inches). Controlling dimension: Millimeters. 2325 Orchard Parkway San Jose, CA 95131 R 0274L–PEEPR–2/3/09 0.51(0.020) 0.33(0.013) 7.60(0.2992) 7.40(0.2914) PIN 1 1.27(0.50) BSC TOP VIEW 18.10(0.7125) 17.70(0.6969) 0.30(0.0118) 0.10(0.0040) 0º ~ 8º 1.27(0.050) 0.40(0.016) ...

Page 16

... E Notes: 1. This package conforms to JEDEC reference MO-183. 2. Dimensions D1 and E do not include mold protrusion. Allowable protrusion 0.15 mm per side and 0.25 mm per side. 3. Lead coplanarity is 0.10 mm maximum. 2325 Orchard Parkway San Jose, CA 95131 R AT28HC64B 16 PIN SEATING PLANE A1 TITLE 28T, 28-lead (8 x 13.4 mm) Plastic Thin Small Outline Package, Type I (TSOP) 0º ...

Page 17

... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...

Related keywords