M24C32-WDW6TP STMicroelectronics, M24C32-WDW6TP Datasheet - Page 31

• Manufacturer Part Number: M24C32-WDW6TP
• Description: IC EEPROM 32KBIT 400KHZ 8TSSOP
• Manufacturer: STMicroelectronics

Specifications of M24C32-WDW6TP

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 32K (4K x 8)
• Speed: 400kHz
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-TSSOP
• Density: 32Kb
• Interface Type: Serial (I2C)
• Organization: 4Kx8
• Access Time (max): 900ns
• Frequency (max): 400KHz
• Write Protection: Yes
• Data Retention: 40Year
• Operating Supply Voltage (typ): 3.3/5V
• Package Type: TSSOP
• Operating Temp Range: -40C to 85C
• Supply Current: 5mA
• Operating Supply Voltage (min): 2.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 8
• Maximum Clock Frequency: 0.4 MHz
• Access Time: 900 ns
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.5 V
• Maximum Operating Current: 2 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 2.5 V, 5.5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-8645-2; M24C32-WDW6TP

M24C32-DF, M24C32-W, M24C32-R, M24C32-F
Table 17.
1. Only M24C32 and M24C32-D devices identified by the process letter K are qualified at 1 MHz.
2. Test conditions (in addition to those in
3. There is no min. or max. values for the input signal rise and fall times. It is however recommended by the
4. With C
5. To avoid spurious Start and Stop conditions, a minimum delay is placed between SCL=1 and the falling or
6. t
7. Characterized only, not tested in production.
t
t
CLQV
QL1QL2
Symbol
t
t
XH1XH2
XL1XL2
t
t
t
t
t
t
t
t
t
t
DXCX
CHDH
I²C specification that the input signal rise and fall times be more than 20 ns and less than 300 ns when
f
rising edge of SDA.
0.7 V
CHCL
CLCH
CLDX
CLQX
CHDL
DHDL
NS
DLCL
C
CLQV
t
f
W
C
< 400 kHz, or less than 120 ns when f
(7)
(5)(6)
CC
(7)
is the time (from the falling edge of SCL) required by the SDA bus line to reach either 0.3 V
L
, assuming that the Rbus × Cbus time constant is within the values specified in
= 10 pF
t
t
t
t
t
SU:STO
SU:DAT
HD:DAT
SU:STA
HD:STA
t
1 MHz AC characteristics
t
f
t
HIGH
Alt.
t
LOW
t
t
SCL
BUF
WR
DH
t
t
t
AA
R
F
F
Clock frequency
Clock pulse width high
Clock pulse width low
Input signal rise time
Input signal fall time
SDA (out) fall time
Data in setup time
Data in hold time
Data out hold time
Clock low to next data valid (access time)
Start condition setup time
Start condition hold time
Stop condition setup time
Time between Stop condition and next Start
condition
Write time
Pulse width ignored (input filter on SCL and
SDA)
Doc ID 4578 Rev 18
Table
Parameter
C
< 1 MHz.
7,
(1)
Table 8
(2)
and
Table
10).
Min.
20
260
500
100
250
250
250
500
50
(3)
(3)
0
0
DC and AC parameters
-
-
(4)
Figure
Max.
450
120
80
(3)
(3)
1
5
-
-
-
-
-
-
-
-
-
5.
CC
or
MHz
Unit
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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