CAT24C256LI-G ON Semiconductor, CAT24C256LI-G Datasheet
CAT24C256LI-G
Specifications of CAT24C256LI-G
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CAT24C256LI-G Summary of contents
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... It features a 64-byte page write buffer and supports both the Standard (100kHz) as well as Fast (400kHz protocol. Write operations can be inhibited by taking the WP pin High (this protects the entire memory). External address pins make it possible to address up to eight CAT24C256 devices on the same bus. FUNCTIONAL SYMBOL V CC SCL ...
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ABSOLUTE MAXIMUM RATINGS Storage Temperature Voltage on Any Pin with Respect to Ground RELIABILITY CHARACTERISTICS Symbol Parameter (4) N Endurance END T Data Retention DR D.C. OPERATING CHARACTERISTICS -40°C to 85°C, ...
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A.C. CHARACTERISTICS -40°C to 85°C, unless otherwise specifi ed Symbol Parameter F Clock Frequency SCL t START Condition Hold Time HD:STA t Low Period of SCL Clock LOW ...
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POWER-ON RESET (POR) The CAT24C256 Die Rev. C incorporates Power-On Reset (POR) circuitry which protects the internal logic against powering up in the wrong state. The device will power up into Standby mode after V exceeds the POR trigger level ...
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Figure 1. Start/Stop Timing SCL SDA CONDITION Figure 2. Slave Address Bits Figure 3. Acknowledge Timing BUS RELEASE DELAY (TRANSMITTER) SCL FROM MASTER DATA OUTPUT FROM TRANSMITTER DATA OUTPUT FROM RECEIVER START Figure 4. Bus Timing t F SCL t ...
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... The CAT24C256 will not acknowledge the Slave address, as long as internal Write is in progress. Hardware Write Protection With the WP pin held HIGH, the entire memory is pro- tected against Write operations. If the WP pin is left fl oating or is grounded, it has no impact on the operation of the CAT24C256. The state of the WP pin is strobed on the last falling edge of SCL immediately preceding the fi ...
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Figure 5. Byte Write Timing BUS ACTIVITY: R MASTER ADDRESS T SDA LINE Don't Care Bit Figure 6. Write Cycle Timing SCL 8 th Bit SDA Byte n Figure 7. Page Write Timing S ...
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... If the Master acknowledges the 1 by the CAT24C256, then the device will continue trans- mitting as long as each data byte is acknowledged by the Master (Figure 11). If the end of memory is reached during sequential Read, then the address counter will ‘wrap-around’ to the beginning of memory, etc. Sequential Read works with either ‘ ...
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Figure 9. Immediate Address Read Timing BUS ACTIVITY: SCL SDA Figure 10. Selective Read Timing BUS ACTIVITY: SLAVE R MASTER ADDRESS T SDA LINE Don't Care Bit Figure 11. Sequential Read Timing BUS ACTIVITY: ...
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PACKAGE OUTLINE DRAWINGS PDIP 8-Lead 300 mils (L) PDIP 8-Lead 300mils (L) For current Tape and Reel information, download the PDF fi le from: http://www.catsemi.com/documents/tapeandreel.pdf Notes: (1) All dimensions are in millimeters. (2) Complies with JEDEC MS-001. Doc. No. MD-1104, ...
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SOIC 8-Lead 150 mils (W) PIN # 1 IDENTIFICATION TOP VIEW D e SIDE VIEW For current Tape and Reel information, download the PDF fi le from: http://www.catsemi.com/documents/tapeandreel.pdf Notes: (1) Complies with JEDEC specifi cation MS-012 dimensions. (2) All linear ...
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SOIC 8-Lead 208 mils (X) PIN#1 IDENTIFICATION TOP VIEW SIDE VIEW For current Tape and Reel information, download the PDF fi le from: http://www.catsemi.com/documents/tapeandreel.pdf Notes: (1) Complies with EIAJ specifi cation. (2) All linear dimensions are in ...
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TSSOP 8-Lead 4.4mm (Y) e TOP VIEW D SIDE VIEW For current Tape and Reel information, download the PDF fi le from: http://www.catsemi.com/documents/tapeandreel.pdf Notes: (1) All dimensions are in milimiters. Angles in degrees (2) Complies with JEDEC MO-153. © 2008 ...
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TDFN 8-Pad 3 x 4.9mm (ZD2) D PIN #1 IDENTIFICATION TOP VIEW SYMBOL MIN NOM A 0.70 0.75 A1 0.00 0.02 A2 0.45 0.55 A3 0.20 REF b 0.25 0.30 D 2.90 3.00 D2 0.90 1.00 E 4.80 4.90 E2 ...
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... For SOIC, EIAJ (X) package the standard lead fi nish is Matte-Tin. This package is available in 2000 pcs/reel, i.e. CAT24C256XI-T2. (5) The TDFN 3x4.9mm (ZD2) package is available in 2000 pcs/reel, i.e., CAT24C256ZD2I-GT2. (6) For additional package and temperature options, please contact your nearest ON Semiconductor Sales offi ce. © 2008 SCILLC. All rights reserved ...
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... Updated Ordering Information Updated PDIP, SOIC, TSSOP, and TDFN Package Outline Drawings 08/15/07 F Updated SOIC 8L, 208mil, Package Outline Drawing 12-Oct-08 G Change logo and fi ne print to ON Semiconductor Doc. No. MD-1104, Rev Characteristics subject to change without notice © 2008 SCILLC. All rights reserved ...
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... SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affi rmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi ...