93LC56BT-E/MS Microchip Technology, 93LC56BT-E/MS Datasheet - Page 10

IC EEPROM 2KBIT 3MHZ 8MSOP

93LC56BT-E/MS

Manufacturer Part Number
93LC56BT-E/MS
Description
IC EEPROM 2KBIT 3MHZ 8MSOP
Manufacturer
Microchip Technology
Datasheet

Specifications of 93LC56BT-E/MS

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
2K (128 x 16)
Speed
2MHz, 3MHz
Interface
Microwire, 3-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Package / Case
8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
falling edge of CS initiates the self-timed auto-erase and
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
2.8
The WRITE instruction is followed by 8 bits (if ORG is
low or A-version devices) or 16 bits (if ORG pin is high
or B-version devices) of data which are written into the
specified address. For 93AA56A/B/C and 93LC56A/B/C
devices, after the last data bit is clocked into DI, the
programming cycle. For 93C56A/B/C devices, the self-
timed auto-erase and programming cycle is initiated by
the rising edge of CLK on the last data bit.
FIGURE 2-8:
FIGURE 2-9:
DS21794F-page 10
CLK
CLK
DO
DO
CS
CS
DI
DI
Write
1
1
High-Z
High-Z
WRITE TIMING FOR 93AA AND 93LC DEVICES
WRITE TIMING FOR 93C DEVICES
0
0
1
1
A
A
N
N
•••
•••
A0
A0
Dx
Dx
•••
•••
The DO pin indicates the Ready/
device, if CS is brought high after a minimum of 250 ns
low (T
is still in progress. DO at logical ‘1’ indicates that the
register at the specified address has been written with
the data specified and the device is ready for another
instruction.
D0
D0
Note:
T
T
CSL
CSL
CSL
). DO at logical ‘0’ indicates that programming
T
WC
T
After the Write cycle is complete, issuing a
Start bit and then taking CS low will clear
the Ready/
WC
Busy
Busy
T
T
SV
SV
Busy
© 2008 Microchip Technology Inc.
Ready
Ready
status from DO.
Busy
High-Z
High-Z
status of the
T
T
CZ
CZ

Related parts for 93LC56BT-E/MS