RC28F128M29EWLA NUMONYX, RC28F128M29EWLA Datasheet

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RC28F128M29EWLA

Manufacturer Part Number
RC28F128M29EWLA
Description
IC FLASH 128MBIT 25NS 64BGA
Manufacturer
NUMONYX
Series
Axcell™r
Datasheet

Specifications of RC28F128M29EWLA

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
128M (16Mx8, 8Mx16)
Speed
60ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
64-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
RC28F128M29EWLA
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Features
January 2011
Micron Technology, Inc., reserves the right to change products or specifications without notice
©2010 Micron Technology, Inc. All rights reserved.
Supply voltage
— V
— V
Asynchronous Random/Page Read
— Page size: 8 words or 16 bytes
— Page access: 25 ns
— Random access: 60 ns (BGA); 70 ns
Buffer Program
— 256-word program buffer
Programming time
— 0.56µs per byte (1.8MB/s) typical when
— 0.31µs per byte (3.2MB/s) typical when
Memory organization
— 128Mbit: 128 main blocks, 128 Kbytes
— 64Mbit: 128 main blocks, 64 Kbytes each
— 32Mbit: 64 main blocks, 64 Kbytes each or
Program/Erase controller
— Embedded byte/word program algorithms
Program/ Erase Suspend and Resume
— Read from any block during Program
— Read and Program another block during
Read
(TSOP)
using 256-word buffer size in buffer
program without V
using 256-word buffer size in buffer
program with V
each
or eight 8-Kbyte boot blocks (top or
bottom) and 127 main blocks, 64 Kbytes
each
eight 8-Kbyte boot blocks (top or bottom)
and 63 main blocks, 64 Kbytes each
Suspend
Erase Suspend
CC
CCQ
= 2.7 to 3.6 V for Program, Erase and
= 1.65 to 3.6 V for I/O buffers
PPH
PPH
128-Mbit, 64-Mbit, 32-Mbit (x8 / x16, page read)
Numonyx
208031-04
Unlock Bypass/Block Erase/Chip Erase/Write
to Buffer
— Faster Buffered/Batch Programming
— Faster Block and Chip Erase
V
— V
— Protects highest/lowest block (H/L
Software protection
— Volatile Protection
— Non-Volatile Protection
— Password Protection
— Password Access
Extended Memory block
— 128-word/256-byte block for permanent,
— Programmable and lockable by Numonyx
Low power consumption
— Standby
Minimum 100,000 Program/Erase cycles per
block
65 nm technology
Density and Packaging
— 56-Lead TSOP (128-Mbit, 64-Mbit)
— 48-Lead TSOP (64-Mbit, 32-Mbit)
— 64-Ball Fortified BGA (128-Mbit, 64-Mbit)
— 48-Ball BGA (64-Mbit, 32-Mbit)
JESD47E compliant
Green packages available
— RoHS Compliant
— Halogen Free
PP
programming performance
uniform) or top/bottom two blocks (T/B
boot)
secure identification.
factory or customer.
/WP# pin protection
PPH
voltage on V
3 V supply flash memory
®
Axcell™ M29EW
PP
to accelerate
Datasheet
1

Related parts for RC28F128M29EWLA

RC28F128M29EWLA Summary of contents

Page 1

... Volatile Protection — Non-Volatile Protection — Password Protection — Password Access Extended Memory block — 128-word/256-byte block for permanent, — Programmable and lockable by Numonyx Low power consumption — Standby Minimum 100,000 Program/Erase cycles per block 65 nm technology Density and Packaging — ...

Page 2

... Read electronic signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.6.2 Verify Extended Memory Block protection indicator . . . . . . . . . . . . . . . . 20 3.6.3 Verify block protection status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.6.4 Hardware Block Protect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4 Hardware Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5 Software Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.1 Volatile Protection mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5.2 Non-Volatile Protection mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 2 /WP 208031-04 ® Numonyx Axcell™ M29EW ...

Page 3

... Numonyx Axcell™ M29EW 5.2.1 Non-Volatile Protection bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5.2.2 Non-Volatile Protection Bit Lock bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.3 Password Protection mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 6 Command Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 6.1 Standard commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 6.1.1 Read/Reset command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 6.1.2 Auto Select command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 6.1.3 Read CFI Query command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 6.1.4 Chip Erase command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 6 ...

Page 4

... Programming and Erase Performance . . . . . . . . . . . . . . . . . . . . . . . . . 80 11 Package Mechanical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . 81 12 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 Appendix A 128-Mbit Memory Address Table . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 Appendix B Common Flash Interface (CFI Appendix C Extended Memory Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 C.1 Numonyx pre-locked Extended Memory Block . . . . . . . . . . . . . . . . . . . . . 95 C.2 Customer-lockable Extended Memory Block . . . . . . . . . . . . . . . . . . . . . . . 96 Appendix D Revision History Numonyx 208031-04 ® Axcell™ M29EW ...

Page 5

... Numonyx Axcell™ M29EW Table 1. Signal descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 2. V /WP# functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 PP Table 3. Bus operations, 8-bit mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Table 4. Bus operations, 16-bit mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Table 5. Read electronic signature - auto select mode - programmer method (8-bit mode Table 6. Read electronic signature - auto select mode - programmer method (16-bit mode Table 7 ...

Page 6

... Toggle/Alternative Toggle bit polling AC waveforms (8-bit mode Figure 34. TSOP56 – 56 lead thin small-outline package, mm, package outline Figure 35. TSOP48 – 48 lead thin small-outline package mm, package outline . . . . . . . . . . 82 Figure 36. BGA48 active ball array, package outline . . . . . . . . . . . . . . . . . . . . . . . . 83 Figure 37. Fortified BGA64 active ball array, package outline . . . . . . . . . . . . . . . 84 6 Numonyx 208031-04 ® Axcell™ M29EW ...

Page 7

... Axcell™ M29EW 1 Description ® The Numonyx Axcell 65nm SBC (Single Bit per Cell) technology is the world’s leading line of parallel NOR flash for embedded applications. They can be read, erased and reprogrammed; and these operations can be performed using a single low voltage (2.7 to 3.6 V) supply. Upon power- up, these memories default to their array read mode ...

Page 8

... Ready/Busy output Byte/word organization select Input/output buffer supply voltage Supply voltage V /Write Protect PP Ground Not connected CCQ WE# CE# M29EW OE # RST 208031-04 ® Numonyx Axcell™ M29EW Direction Inputs I/O I/O I/O or input Input Input Input Input Output Input Supply Supply Input - - V /WP DQ0 – ...

Page 9

... Numonyx Axcell™ M29EW Figure 2. 56-Lead TSOP connections RFU WE# 14 RST /WP RY/BY RFU 28 RFU 1. A-1 is the least significant address bit in x8 mode. 2. A21 is valid for 64-Mbit density and above; otherwise RFU. 3. A22 is valid for 128-Mbit density; otherwise RFU. 4. RFU stands for Reserved for Future Use. ...

Page 10

... A-1 is the least significant address bit in x8 mode. 2. A21 is valid for 64-Mbit density; otherwise RFU. 3. RFU stands for Reserved for Future Use. 10 48-Lead TSOP Pinout Top View 208031-04 ® Numonyx Axcell™ M29EW 48 A16 47 BYTE# 46 Vss 45 DQ15/A-1 44 DQ7 43 DQ14 42 DQ6 41 DQ13 ...

Page 11

... Numonyx Axcell™ M29EW Figure 4. 48B BGA connections (top and bottom views RY/BY# WE# B Vpp/ A4 A17 RST# WP A18 A21 A20 A19 CE# D8 D10 D12 G OE# D9 D11 Vcc H Vss BGA Top View- Ball side down 1. A-1 is the least significant address bit in x8 mode. ...

Page 12

... A 11 A15 Vccq Vccq D5 D7 A16 Vss Vss D14 BYTE# RFU RFU D15/ RFU RFU Vcc D13 A Vss RFU RFU 208031-04 ® Numonyx Axcell™ M29EW A13 A9 WE# RY/BY# A7 RST# Vpp/ A12 A8 A17 WP# A14 A10 A21 A18 A6 A15 A11 A19 A20 ...

Page 13

... Numonyx Axcell™ M29EW Figure 6. 128-Mbit Block addresses A<22:-1> 128 Mbit 0FFFFFF 128-Kbyte Block 0FE0000 07FFFFF 128-Kbyte Block 07E0000 003 FFFF 128-Kbyte Block 0020000 001 FFFF 128-Kbyte Block 0000000 Byte-Wide (x8) Mode Figure 7. 64-Mbit and 32-Mbit Uniform Block addresses A<21:-1> 64 Mbit A< ...

Page 14

... Top Boot 32Mbit Top Boot 64Mbit Byte Wide (x8) Mode Word Wide (x16) Mode 208031-04 ® Numonyx Axcell™ M29EW A<20:0> 32 Mbit 8KB/4KW Block 1FF000 – 1FFFFF 70 8KB/4KW Block 1FE000 – 1FEFFF 69 8KB/4KW Block 1FD000 – ...

Page 15

... Numonyx Axcell™ M29EW 2 Signal Descriptions See Figure 1: Logic signals. 2.1 Address inputs (A0-A22) The Address inputs select the cells in the memory array, CFI space to access during Bus Read operations. During Bus Write operations they direct the commands sent to the command interface of the Program/Erase controller ...

Page 16

... PPH waveforms). from any mode except in read mode or during programming, PPH /Write Protect pin and the PP1 PP2 /WP# functions. PP Function Protection). 208031-04 ® Numonyx Axcell™ M29EW must be slower than t IH VHVPP ground pin to decouple the Table 22: DC PP3 PP4 (see ...

Page 17

... Numonyx Axcell™ M29EW 2.9 Reset (RST#) The Reset pin can be used to apply a Hardware Reset to the memory. A hardware reset is achieved by holding Reset Low, V memory will be ready for Bus Read and Bus Write operations after whichever occurs last. See RHGL Reset AC characteristics, 2 ...

Page 18

... Signal Descriptions 2.14 V ground the reference for all voltage measurements. The device features two which must be connected to the system ground. 18 Numonyx 208031-04 ® Axcell™ M29EW pins; both SS ...

Page 19

... Numonyx Axcell™ M29EW 3 Bus Operations There are four standard bus operations that control the device. These are Bus Read (Random and Page modes), Bus Write, Output Disable, Standby. See Table 3: Bus operations, 8-bit mode summary. Typical glitches of less than 5ns on Chip Enable, Write Enable, and Reset pins are ignored by the memory and do not affect bus operations ...

Page 20

... Verify Extended Memory Block protection indicator The Extended Memory Block is either Numonyx pre-locked or customer-lockable. The protection status of the Extended Memory Block (pre-locked or customer-lockable) can be accessed by reading the Extended Memory Block protection indicator. It can be read in Auto Select mode using either the programmer (see ...

Page 21

... Numonyx Axcell™ M29EW 3.6.4 Hardware Block Protect Hardware protection of certain memory blocks is supported via the V protection function. When V two (M29EWT), or bottom two (M29EWB) blocks are protected ; these, and other blocks, may also be enabled with software protection. /WP the highest (M29EWH), lowest (M29EWL), top ...

Page 22

... X IL Address Inputs /WP Word address Command address 208031-04 ® Numonyx Axcell™ M29EW Data Inputs/Outputs DQ[14:8] Hi-Z Hi-Z X Hi-Z X Hi-Z X Hi-Z Data Inputs/Outputs A[max:0] DQ[15:0] Data output Data input X Hi-Z X Hi-Z X Hi-Z DQ[7:0] Data output (3) Data input Hi-Z Hi-Z Hi-Z (3) ...

Page 23

... Numonyx Axcell™ M29EW Table 5. Read electronic signature - auto select mode - programmer method (8-bit mode) Read CE# OE# WE# (1) cycle Amax-A7 A6 A5- A-1 DQ[14:8] Manufacture r code Device code (cycle 1) Device code (cycle Device code (cycle Table 6. Read electronic signature - auto select mode - programmer method (16-bit mode) ...

Page 24

... 0Ah (customer- 9Ah (Numonyx pre- 1Ah (customer- 01h (protected 00h (unprotected) Data inputs/outputs DQ[15:0] 0089h (Numonyx pre- locked) 0009h (customer-lockable) 0099h (Numonyx pre- locked) 0019h (customer-lockable) 008Ah (Numonyx pre locked 000Ah (customer-lockable) 009Ah (Numonyx pre- locked) 001Ah (customer-lockable) 0001h (protected ...

Page 25

... Password Access may be combined with Non-Volatile and/or Volatile Protection to create a multi-tiered solution. Please contact your Numonyx Sales representative for further details concerning Password Access feature. /WP# pin that protects the highest, lowest, top two or bottom two PP for a detailed description of the signal ...

Page 26

... Volatile Protection mode command set. 26 and Section 6.3.5: Non-Volatile Protection mode command for a description of the volatile Protection mode command set. bit). and Figure 9: Software protection scheme Section 6.3.5 208031-04 ® Numonyx Axcell™ M29EW Section 5.2: Non- /WP# Low /WP# pin is High they PPH for a description of the Non- set) ...

Page 27

... Numonyx Axcell™ M29EW 5.2.2 Non-Volatile Protection Bit Lock bit The Non-Volatile Protection Bit Lock bit (NVPB Lock bit global volatile bit for all NVPBs. When set (programmed to ‘0’), it prevents changing the state of the NVPBs. When reset to ‘1’, the NVPBs can be set and reset using the NVPB Program command and Clear all NVPBs command, respectively ...

Page 28

... Volatile protection Non-volatile protection 1. NVPBs default to ‘1’ (block unprotected) when shipped from Numonyx. A block is protected or unprotected when its NVPB is set to ‘0’ and ‘1’, respectively. NVPBs are programmed individually and cleared collectively. 2. VPB default status depends on ordering option. A block is protected or unprotected when its VPB is set to ‘0’ and ‘1’, respectively. VPBs can be programmed and cleared individually. 3. The NVPB Lock bit is volatile and default to ‘ ...

Page 29

... Numonyx Axcell™ M29EW 6 Command Interface All Bus Write operations to the memory are interpreted by the command interface. Commands consist of one or more sequential Bus Write operations. Failure to observe a valid sequence of Bus Write operations will result in the memory returning to Read mode. The long command sequences are imposed to maximize data security. ...

Page 30

... During the time-out period, additional sector addresses and sector erase commands may be written. Once the Program/Erase controller has started not possible to select 30 Appendix B, Table 36, Table 28. All Bus Read operations during the Chip Erase Table 208031-04 ® Numonyx Axcell™ M29EW and 37, Table 38, Table 39 Section 7.2: Status ...

Page 31

... Numonyx Axcell™ M29EW any more blocks. Each additional block must therefore be selected within the time-out period of the last block. The time-out timer restarts when an additional block is selected. After the sixth Bus Write operation, a Bus Read operation outputs the Status Register. See ...

Page 32

... The system must issue a Program Resume command, to exit the Program Suspend mode and to continue the programming operation. 32 Table 28: Programming and Erase and Figure 25: Write Enable Controlled Program for details. 208031-04 ® Numonyx Axcell™ M29EW for the values of Block Erase time- Performance) and updates Figure 24: Write Enable Controlled ...

Page 33

... Numonyx Axcell™ M29EW Further issuing of the Resume command is ignored. Another Program Suspend command can be written after the device has resumed programming. 6.1.10 Program command The Program command can be used to program a value to one address in the memory array at a time. The command requires four Bus Write operations, the final write operation latches the address and data in the internal state machine and starts the Program/Erase controller ...

Page 34

... AAA AAA AA 555 55 AAA AAA AA 555 55 AAA Table 5: Read electronic signature - auto select mode - programmer Table 11: Fast Program commands, 8-bit mode mode). 208031-04 ® Numonyx Axcell™ M29EW (1) 4th 5th Data Add Data Add Data Add Data - - - - - (2)(3) (2)( AAA AA 555 55 AAA ...

Page 35

... Numonyx Axcell™ M29EW Table 10. Standard commands, 16-bit mode Command 1 Read/Reset 3 Manufacturer code Device code Extended Memory Auto 3 Block protection Select indicator Block protection status (4) Program 4 Chip Erase 6 Block Erase 6+ Erase/Program Suspend 1 Erase/Program Resume 1 Read CFI Query Don’t care Program Address Program Data, BAd = any address in the Block. All values in the table are in hexadecimal ...

Page 36

... PP Section 6.2.9: Unlock Bypass and Section 6.1.9: Program Resume Table 28: Programming and Erase and for command details. 208031-04 ® Numonyx Axcell™ M29EW and the Table 12: Fast Figure 31: Accelerated command). Performance. Table 12: Fast Program ...

Page 37

... Numonyx Axcell™ M29EW 6.2.2 Quadruple Byte/Word Program command The Quadruple Byte/Word Program command for 32-Mbit and 64-Mbit devices is used to write a page of four adjacent bytes/words in parallel. The four bytes/words must differ for addresses A0, DQ15/A mode or addresses A1 x16 mode. Five bus write cycles are necessary to issue the Quadruple Byte/Word Program command: 1 ...

Page 38

... Write to Buffer Program command. 38 92) is set to 08h (256 bytes) for backward compatible (programming acceleration). PPH for details of the available program buffer size. Figure 10 208031-04 ® Numonyx Axcell™ M29EW Table 39: /WP# pin can be either held PP code, for a suggested flow chart ...

Page 39

... Numonyx Axcell™ M29EW 6.2.5 Enhanced Buffer Program The Enhanced Buffer Program command, available only on x16 mode 128-Mbit device, makes use of the device’s 256-word write buffer to speed up programming. 256 words can be loaded into the write buffer. Each write buffer has the same A22-A8 addresses. The Enhanced Buffer Program command dramatically reduces system programming time ...

Page 40

... Figure 10. Boundary condition of program buffer size 0000h 0100h 0200h 40 256 Words 256 Words program buffer is allowed 256 Words 256 Words program buffer is allowed 208031-04 ® Numonyx Axcell™ M29EW 255 Words or less program Any buffer is buffer allowed program attempt is not allowed ...

Page 41

... Numonyx Axcell™ M29EW Figure 11. Write to Buffer Program fletcher and pseudo code YES 1. n+1 is the number of addresses to be programmed Write to Buffer Program Abort and Reset must be issued to return the device in Read mode. 3. When the block address is specified, any address in the selected block address space is acceptable. However when ...

Page 42

... Program Abort and Reset command sequence must be written to reset the device for the next operation. Note that the full 3-cycle Buffered Program Abort and Reset command sequence is required when using Buffer Programming features in Unlock Bypass mode. 42 Numonyx 208031-04 ® Axcell™ M29EW ...

Page 43

... Numonyx Axcell™ M29EW 6.2.7 Write to Buffer Program Confirm command The Write to Buffer Program Confirm command is used to confirm a Write to Buffer Program command and to program the N+1 words/bytes loaded in the program buffer by this command. 6.2.8 Enhanced Buffer Program Confirm command The Enhanced Buffer Program Confirm command is used to confirm an Enhanced Buffer Program command and to program the 256 words loaded in the buffer ...

Page 44

... Enhanced Buffer Program command and to program the 256 words loaded in the buffer. 44 Section 6.1.5: Block Erase command Section 6.1.4: Chip Erase command for details). for the details). 208031-04 ® Numonyx Axcell™ M29EW for details). for details). Section 6.2.4: Write to Buffer Table 12: Fast Program for the behavior ...

Page 45

... Numonyx Axcell™ M29EW 6.2.15 Unlock Bypass Reset command The Unlock Bypass Reset command can be used to return to Read/Reset mode from Unlock Bypass mode. Two Bus Write operations are required to issue the Unlock Bypass Reset command. Read/Reset command does not exit from Unlock Bypass mode. ...

Page 46

... Add Data Add Data (2) 555 50 PA2 PD (3) 555 56 PA4 PD 555 AA 2AA 55 ( 555 AA 2AA 55 ( 555 AA 2AA 55 555 AA 2AA BAd (4) BAd 25 BAd N (4) BAd 33 BAd 208031-04 ® Numonyx Axcell™ M29EW (1) 3rd 4th Add Data Add Data - - - - - - - - (4) BAd 25 BAd (4) BAd 33 BAd 555 555 ( ( ...

Page 47

... Numonyx Axcell™ M29EW 6.3 Protection commands Blocks can be protected individually against accidental program, erase or read operations. The device block protection scheme is shown in either 13, or Table summary of the Block Protection commands. Block protection commands are available both in 8-bit and 16-bit configuration. ...

Page 48

... If the Password Mode Lock bit is programmed and the user attempts to read the password, the device will output FFh onto the I/O data bus. An Exit Protection Command Set command must be issued to return the device to Read mode. 48 14. Section 6.3.8: Exit Protection command 208031-04 ® Numonyx Axcell™ M29EW Section 7.1: Lock Register, set). ...

Page 49

... Numonyx Axcell™ M29EW Password Unlock command The Password Unlock command is used to clear the NVPB Lock bit allowing to modify the NVPBs. The Password Unlock command must be issued along with the correct password. There must µs delay between successive Password Unlock commands in order to prevent hackers from cracking the password by trying all possible 64-bit combinations ...

Page 50

... Addr = BAd NO DQ6= Toggle YES NO DQ5=1 YES Wait 500 μs Read Byte twice Addr = BAd NO Read Byte twice DQ6= Toggle Addr = BAd YES DQ0= NO '1'(Erase) '0'(Program) YES Fail Reset Pass Exit NVPB command set 208031-04 ® Numonyx Axcell™ M29EW AI14242 ...

Page 51

... Numonyx Axcell™ M29EW 6.3.6 NVPB Lock Bit command set Enter NVPB Lock Bit Command Set command Three bus Write cycles are required to issue the Enter NVPB Lock Bit Command Set command. Once the command has been issued, the commands allowing to set the NVPB Lock bit can be issued to the device ...

Page 52

... Enter Extended 3 AAA AA 555 (4) Memory Block 52 (1)(2)(3) Bus operations 3rd 4th 5th Ad Data Ad Data Ad Data Ad 55 AAA ( AAA AAA AAA AAA AAA 208031-04 ® Numonyx Axcell™ M29EW 6th 7th 8th 9th Data Ad Data Ad Data Ad Data 10th 11th Data Ad Data - - - ...

Page 53

... Numonyx Axcell™ M29EW address; Dat = data; BAd = Any address in the Block Read data; PWDn = Password byte PWAn = Password Address ( 7 Don’t care. All values in the table are in hexadecimal. 2. Grey cells represent Read cycles. The other cells are Write cycles. ...

Page 54

... C0 - BAd 2AA 55 555 2AA 55 555 E0 - BAd BAd 2AA 55 555 88 - 2AA 55 555 90 X 208031-04 ® Numonyx Axcell™ M29EW 4th 5th 6th Data Ad Data Ad Data - - - - - - - - - - - - - - - - - - - - - - - - - PWD3 - - - - PWD1 02 PWD2 03 PWD3 - - - - - - - - - - - - - - - - - - - - - - - - - ...

Page 55

... Numonyx Axcell™ M29EW address; Dat = data; BAd = Any address in the Block Read data; PWDn = Password byte PWAn = Password Address ( 3 Don’t care. All values in the table are in hexadecimal. 2. Grey cells represent Read cycles. The other cells are Write cycles. ...

Page 56

... The Non-Volatile Protection Mode Lock bit, DQ1, is one-time programmable. Programming (setting to ‘0’) this bit permanently places the device in Non-Volatile Protection mode. When shipped from Numonyx factory, all parts default to operate in Non-Volatile Protection mode. The memory blocks are unprotected (NVPBs set to ‘1’). ...

Page 57

... Table 15. Lock Register bits (2) DQ15-3 Password Protection Mode Lock Reserved 1. DQ0, DQ1 and DQ2 Lock Register bits are set to ‘1’ when shipped from the Numonyx. 2. DQ15 to DQ3 are reserved and default to ‘1’. Table 16. Block Protection Status Block (1) NVPB Lock bit ...

Page 58

... Program Lock Register Data: Add Dont' care, Data A0h Add Dont' care (1) , Data PDh Polling algorithm YES Done NO DQ5 = 1 PASS: Table 15: Lock Register bits). 208031-04 ® Numonyx Axcell™ M29EW Unlock cycle 1 unlock cycle 2 NO YES FAIL Reset to return the device to Read mode ai13677 ...

Page 59

... Numonyx Axcell™ M29EW 7.2 Status Register The M29EW device has one Status Register. The various bits convey information and errors on the current and previous program/erase operation. Bus Read operations from any address within the memory, always read the Status Register during Program and Erase operations ...

Page 60

... The Buffered Program Abort and Reset command must be issued to return the device to Read mode (see Write to Buffer Program in For the complete polling flow chart, please refer to chart. 60 Numonyx Section 6.1: Standard Figure 16.: Status Register polling flow 208031-04 ® Axcell™ M29EW ...

Page 61

... Numonyx Axcell™ M29EW Table 17. Status Register bits Operation (2) Program Program During Erase Suspend (2) Buffered Program Abort Program Error Chip Erase Block Erase before timeout Block Erase Erase Suspend Erase Error 1. Unspecified data bits should be ignored. DQ7 2. for Buffer Program is related to the last address location loaded. ...

Page 62

... Registers Figure 14. Data polling flow chart 62 START READ DQ5 & DQ7 at VALID ADDRESS DQ7 YES = DATA DQ5 = 1 YES YES READ DQ7 at VALID ADDRESS DQ7 YES = DATA NO FAIL 208031-04 ® Numonyx Axcell™ M29EW PASS AI07760 ...

Page 63

... Numonyx Axcell™ M29EW Figure 15. Toggle flow chart START READ DQ6 at Valid Address READ DQ5 & DQ6 at Valid Address DQ6 NO = TOGGLE YES NO DQ5 = 1 YES READ DQ6 TWICE at Valid Address DQ6 NO = TOGGLE YES FAIL PASS AI11530 208031-04 Registers 63 ...

Page 64

... Read 3 Read2.DQ2 Read3.DQ2 DQ6 Yes Timeout failure toggling ? No Device Busy , Re- Poll Yes DQ1=1? No Device Busy , Re- No Poll 208031-04 ® Numonyx Axcell™ M29EW Programming Read3 correct Yes Operation? data Programming Operation Failed DQ6 Yes DEVICE ERROR toggling ? No DQ2 Device in Erase / Yes ...

Page 65

... These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Refer also to the relevant quality documents from Numonyx. Table 18. Absolute maximum ratings ...

Page 66

... Figure 18. AC measurement I/O waveform V CCQ 66 conditions. Designers should check that the Parameter V ) CCQ DEVICE UNDER TEST 0.1 µF 0.1 µ includes JIG capacitance 0 V 208031-04 ® Numonyx Axcell™ M29EW Min Max Unit 2.7 3.6 V 1.7 3.6 V -0.6 12 ° 2.5 ns ...

Page 67

... Numonyx Axcell™ M29EW Table 20. Power-up wait timings Symbol Alt VCHVCQH CC ( VCHPH VCS CC ( VCQHPH VIOS CCQ t t RST# High to Chip Enable Low PHEL RST# High to Write Enable Low PHWL 1. V and V ramps must be synchronized during power-up. CC CCQ 2. If RST# is not stable for t ...

Page 68

... PP CC RST ± 0 /WP ± /WP /WP ± / 100 µ CC(min CCQ CCQ(min -100 µ CC(min CCQ CCQ(min ± 5 µA on the V /WP# pin. PP 208031-04 ® Numonyx Axcell™ M29EW Min Max OUT Min Typ Max - - ± ± 120 - 35 120 - 35 120 - PPH - 0 0 ...

Page 69

... Numonyx Axcell™ M29EW Figure 20. Random Read AC waveforms (8-bit mode) A0-AMAX/A-1 CE# OE# DQ0-DQ7 BYTE# tELBL Figure 21. Random Read AC waveforms (16-bit mode) A0-AMAX CE# OE# DQ0-DQ15 BYTE# tELBH tAVAV VALID tAVQV tELQV tELQX tGLQX tGLQV tBLQZ tAVAV VALID tAVQV tELQV tELQX tGLQX ...

Page 70

... VALID VALID VALID Test condition 208031-04 ® Numonyx Axcell™ M29EW tAXQX tBHQV DATA OUT DATA OUT Byte_Transition_AC-Waveform VALID VALID tEHQZ tGHQX tGHQZ VALID VALID Limit BGA TSOP Min 60 70 Max 60 70 Max 25 Min 0 Max 60 70 ...

Page 71

... Numonyx Axcell™ M29EW Table 23. Read AC characteristics (Sheet Symbol Alt. Parameter t t Output Enable Low to Output Valid GLQV OE ( Chip Enable High to Output Hi-Z EHQZ HZ ( Output Enable High to Output Hi-Z GHQZ DF t Chip Enable, Output Enable or EHQX t t Address Transition to Output ...

Page 72

... PA PA tAVWL tWLAX tWHEH tWHWL AOh PD DQ7 tWHDX Section 7.2.1: Data Polling bit Controlled, Table 25: Write AC characteristics, Chip Enable for details on the timings. 208031-04 ® Numonyx Axcell™ M29EW Read cycle tAVAV tELQV tGLQV tGHQZ tAXQX D OUT D OUT AI13699 (DQ7)). ...

Page 73

... Numonyx Axcell™ M29EW M Table 24. Write AC characteristics, Write Enable Controlled Symbol Alt t t Address Valid to Next Address Valid AVAV Chip Enable Low to Write Enable Low ELWL Write Enable Low to Write Enable High WLWH Input Valid to Write Enable High DVWH Write Enable High to Input Transition ...

Page 74

... PA AAAh tAVEL tELAX tWLEL tEHWH tGHEL tELEH tEHEL1 tDVEH tWHWH1 AOh PD tEHDX Section 7.2.1: Data Polling bit Controlled, Table 25: Write AC characteristics, Chip Enable for details on the timings. 208031-04 ® Numonyx Axcell™ M29EW Data Polling PA D OUT DQ7 AI13334 (DQ7)). ...

Page 75

... Numonyx Axcell™ M29EW Figure 27. Chip Enable Controlled Program waveforms (16-bit mode) A0-Amax WE# OE# CE# DQ0-DQ15 1. Only the third and fourth cycles of the Program command are represented. The Program command is followed by the check of Status Register Data Polling bit the address of the memory location to be programmed the data to be programmed. ...

Page 76

... AAh 55h 80h tWHDX Controlled, Table 25: Write AC characteristics, Chip Enable for details on the timings. Parameter Limit Min Min Min Min Min Min Min Min Min Min 208031-04 ® Numonyx Axcell™ M29EW 555h/BAd 2AAh (1) 10h/ AAh 55h 30h AI13335 BGA TSOP ...

Page 77

... Numonyx Axcell™ M29EW Figure 29. Reset AC waveforms (no program/erase in progress) RY/BY# CE#, OE# RST# tPLPH Figure 30. Reset AC waveforms (during program/erase operation) RY/BY# CE#,OE# RST# Table 26. Reset AC characteristics Symbol Alt. ( RST# Low to Read mode, during Program or Erase PLRH READY t t RST# Pulse width ...

Page 78

... DQ7 Output Flag tWHRL tGHAX tAXGL tEHAX tEHEL2 tGHGL2 tGLQV tELQV Toggle Toggle tWHRL 208031-04 ® Numonyx Axcell™ M29EW tEHQZ tGHQZ DQ7 Valid DQ7 Data Valid DQ6-DQ0 Output Flag Data AI13336c and Table 23: Read AC tAVEL tGHGL2 Stop Output Toggle ...

Page 79

... Numonyx Axcell™ M29EW Table 27. Accelerated Program and Data Polling/Data Toggle AC characteristics Symbol Alt /WP# raising or falling time VHVPP Valid VHHWH Address setup time to Output Enable Low during Toggle bit polling AXGL ASO t GHAX, t Address hold time from Output Enable during Toggle bit polling ...

Page 80

... Numonyx Axcell™ M29EW (1)(2) (2) Min Typ Max - 0 175 - 10 200 - 70 200 - 85 200 - 160 710 - 2.19 6.25 - 1.33 3.125 - 0.625 2. 175 - 70 200 - 85 200 - 160 710 - 284 1280 ...

Page 81

... Axcell™ M29EW 11 Package Mechanical Specifications Numonyx offers these devices in both lead-free and leaded packages. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ...

Page 82

... N DIE C Typ – 0.10 1.00 0.22 – – 12.00 20.00 18.40 0.50 0. 208031-04 ® Numonyx Axcell™ M29EW millimeters Min Max – 1.20 0.05 0.15 0.95 1.05 0.17 0.27 0.10 0.21 – 0.10 11.90 12.10 19.80 20.20 18.30 18.50 – – ...

Page 83

... Numonyx Axcell™ M29EW Figure 36. BGA48 active ball array, package outline 1. Drawing is not to scale. 2. Drawing is bottom view. Table 31. BGA48 active ball array, package mechanical data Symbol ddd Package Mechanical Specifications millimeters Typ Min – – – 0.20 0.64 – 0.35 ...

Page 84

... Typ – 0.49 0.80 0.60 11.00 7.00 – 1.00 13.00 7.00 2.00 3.00 0.50 0.50 208031-04 ® Numonyx Axcell™ M29EW SE ddd A2 A1 BGA-Z23 millimeters Min Max – 1.40 0.40 – – – 0.55 0.65 10.90 11.10 – – – 0.10 – ...

Page 85

... This product is also available with the Extended Memory Block Numonyx pre-locked. For further details and ordering information contact your nearest Numonyx sales office. Devices are shipped from Numonyx factory with the memory content bits erased to ‘1’. For a list of available options (package, High/Low protect, etc.) or for further information on any aspect of the device, please contact your nearest Numonyx Sales Office ...

Page 86

... JS28F128M29EWH* JS28F128M29EWL* PC28F128M29EWH* PC28F128M29EWL* RC28F128M29EWH* RC28F128M29EWL Note: For further information on ordering products or for product part numbers, go to: http://www.numonyx.com/en-US/MemoryProducts/Pages/PartNumberLookup.aspx. 86 Numonyx 64-Mbit JS28F064M29EWH* JS28F064M29EWL* JS28F064M29EWB* JS28F064M29EWT* JR28F064M29EWH* JR28F064M29EWL* JR28F064M29EWB* JR28F064M29EWT* PC28F064M29EWH* PC28F064M29EWL* PC28F064M29EWB* PC28F064M29EWT* PZ28F064M29EWH* PZ28F064M29EWL* PZ28F064M29EWB* PZ28F064M29EWT* 208031-04 ® Axcell™ M29EW ...

Page 87

... Numonyx Axcell™ M29EW Appendix A 128-Mbit Memory Address Table Table 35. Block Address Table Block Number (1) Block Size x8 Address (Kbytes / Kwords) (HEX) 128 / 64 0000000-001FFFF 128 / 64 0020000-003FFFF 128 / 64 0040000-005FFFF 128 / 64 0060000-007FFFF 128 / 64 0080000-009FFFF 128 / 64 00A0000-00BFFFF 128 / 64 00C0000-00DFFFF 128 / 64 00E0000-00FFFFF 128 / 64 0100000-011FFFF 128 / 64 ...

Page 88

... Numonyx Axcell™ M29EW x16 Address (HEX) 01F0000-01FFFFF 0200000-020FFFF 0210000-021FFFF 0220000-022FFFF 0230000-023FFFF 0240000-024FFFF 0250000-025FFFF 0260000-026FFFF 0270000-027FFFF 0280000-028FFFF 0290000-029FFFF 02A0000-02AFFFF 02B0000-02BFFFF 02C0000-02CFFFF 02D0000-02DFFFF ...

Page 89

... Numonyx Axcell™ M29EW Table 35. Block Address Table Block Number (1) Block Size x8 Address (Kbytes / Kwords) (HEX) 128 / 64 0820000-083FFFF 128 / 64 0840000-085FFFF 128 / 64 0860000-087FFFF 128 / 64 0880000-089FFFF 128 / 64 08A0000-08BFFFF 128 / 64 08C0000-08DFFFF 128 / 64 08E0000-08FFFFF 128 / 64 0900000-091FFFF 128 / 64 0920000-093FFFF 128 / 64 0940000-095FFFF 128 / 64 0960000-097FFFF 128 / 64 0980000-099FFFF ...

Page 90

... Numonyx Axcell™ M29EW x16 Address (HEX) 0630000-063FFFF 0640000-064FFFF 0650000-065FFFF 0660000-066FFFF 0670000-067FFFF 0680000-068FFFF 0690000-069FFFF 06A0000-06AFFFF 06B0000-06BFFFF 06C0000-06CFFFF 06D0000-06DFFFF 06E0000-06EFFFF 06F0000-06FFFFF 0700000-070FFFF 0710000-071FFFF ...

Page 91

... Numonyx Axcell™ M29EW Appendix B Common Flash Interface (CFI) The Common Flash Interface is a JEDEC approved, standardized data structure that can be read from the Flash memory device. It allows a system software to query the device to determine various electrical and timing parameters, density information and functions supported by the memory. The system can interface easily with the device, enabling the software to upgrade itself when necessary ...

Page 92

... Maximum time-out per individual block erase = 2 times typical time-out Maximum time-out for Chip Erase = 2 time-out Description n Device size = 2 in number of bytes Flash device interface code description 208031-04 ® Numonyx Axcell™ M29EW Value 2.7 V 3.6 V 11 µs 16 µs 512 µs ...

Page 93

... Numonyx Axcell™ M29EW Table 39. Device geometry definition Address Data x16 x8 2Ah 54h 0008h 2Bh 56h 0000h 2Ch 58h See below table 2Dh 5Ah 2Eh 5Ch See below table 2Fh 5Eh 30h 60h 31h 62h 32h 64h See below table ...

Page 94

... Bottom boot device, HW protection for bottom two blocks xx = 03h: Top boot device, HW protection for top two blocks xx = 04h: Uniform device, HW protection for lowest block xx = 05h: Uniform device, HW protection for highest block Program suspend not supported supported 208031-04 ® Numonyx Axcell™ M29EW (1) Required supported supported boot, top ...

Page 95

... If the Extended Memory Block is not pre-locked by Numonyx, it can be customer-lockable. Its status is indicated by bit DQ7 of Extended Memory Block Verify Indicator in Auto Select mode. This bit is permanently set to either ‘1’ or ‘0’ at the Numonyx factory and cannot be changed. When set to ‘1’, it indicates that the device is pre-locked by Numonyx and the Extended Memory Block is protected. When set to ‘ ...

Page 96

... Extended Memory Block mode and return the device to Read mode. Table 41. Extended Memory Block address and data (1) Address x8 x16 000000h-00000Fh 000000h-000007h 000010h-0000FFh 000008h-00007Fh 1. 96 Data Numonyx pre-locked Secure identification Determined by number customers Protected and (default) unavailable 208031-04 ® Numonyx Axcell™ M29EW Customer-lockable Secure identification number ...

Page 97

... Numonyx Axcell™ M29EW Appendix D Revision History Table 42. Document revision history Date Version Jun 2009 01 Apr 2010 02 May 2010 03 Jan 2011 04 Changes Initial release Added 48L TSOP and 48B BGA connection information. Added 64M and 32M memory map. Added 48L TSOP and 48B BGA package outline information. ...

Page 98

... All other trademarks are the property of their respective owners. This data sheet contains minimum and maximum limits specified over Although considered final, these specifications are subject to change, as further product development and data characterization sometimes occur. 98 the power supply and temperature range set forth herein. ® Numonyx Axcell™ M29EW ...

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