PSD834F2-70M STMicroelectronics, PSD834F2-70M Datasheet - Page 38

• Manufacturer Part Number: PSD834F2-70M
• Description: IC FLASH 2MBIT 70NS 52QFP
• Manufacturer: STMicroelectronics

Specifications of PSD834F2-70M

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 2M (256K x 8)
• Speed: 70ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 52-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 497-2005

PSD813F2V, PSD854F2V
Product Term Allocator
The CPLD has a Product Term Allocator. The PS-
Dabel compiler uses the Product Term Allocator to
borrow and place product terms from one macro-
cell to another. The following list summarizes how
product terms are allocated:
■
■
■
Each macrocell may only borrow product terms
from certain other macrocells. Product terms al-
ready in use by one macrocell are not available for
another macrocell.
If an equation requires more product terms than
are available to it, then “external” product terms
are required, which consume other Output Macro-
cells (OMC). If external product terms are used,
extra delay is added for the equation that required
the extra product terms.
This is called product term expansion. PSDsoft
Express performs this expansion as needed.
Loading and Reading the Output Macrocells
(OMC)
The Output Macrocells (OMC) block occupies a
memory location in the MCU address space, as
defined by the CSIOP block (see the section enti-
tled
the 16 Output Macrocells (OMC) can be loaded
from the data bus by a MCU. Loading the Output
Macrocells (OMC) with data from the MCU takes
priority over internal functions. As such, the preset,
clear, and clock inputs to the flip-flop can be over-
ridden by the MCU. The ability to load the flip-flops
and read them back is useful in such applications
as loadable counters and shift registers, mailbox-
es, and handshaking protocols.
38/109
McellAB0-McellAB7 all have three native
product terms and may borrow up to six more
McellBC0-McellBC3 all have four native
product terms and may borrow up to five more
McellBC4-McellBC7 all have four native
product terms and may borrow up to six more.
I/O PORTS, page
51). The flip-flops in each of
Doc ID 10552 Rev 3
Data can be loaded to the Output Macrocells
(OMC) on the trailing edge of Write Strobe (WR,
CNTL0) (edge loading) or during the time that
Write Strobe (WR, CNTL0) is active (level load-
ing). The method of loading is specified in PSDsoft
Express Configuration.
The OMC Mask Register
There is one Mask Register for each of the two
groups of eight Output Macrocells (OMC). The
Mask Registers can be used to block the loading
of data to individual Output Macrocells (OMC).
The default value for the Mask Registers is 00h,
which allows loading of the Output Macrocells
(OMC). When a given bit in a Mask Register is set
to a 1, the MCU is blocked from writing to the as-
sociated Output Macrocells (OMC). For example,
suppose McellAB0-McellAB3 are being used for a
state machine. You would not want a MCU write to
McellAB to overwrite the state machine registers.
Therefore, you would want to load the Mask Reg-
ister for McellAB (Mask Macrocell AB) with the val-
ue 0Fh.
The Output Enable of the OMC
The Output Macrocells (OMC) block can be con-
nected to an I/O port pin as a PLD output. The out-
put enable of each port pin driver is controlled by
a single product term from the AND Array, ORed
with the Direction Register output. The pin is en-
abled upon Power-up if no output enable equation
is defined and if the pin is declared as a PLD out-
put in PSDsoft Express.
If the Output Macrocell (OMC) output is declared
as an internal node and not as a port pin output in
the PSDabel file, the port pin can be used for other
I/O functions. The internal node feedback can be
routed as an input to the AND Array.