DS1220Y-200IND+ Maxim Integrated Products, DS1220Y-200IND+ Datasheet

IC NVSRAM 16KBIT 200NS 24DIP

DS1220Y-200IND+

Manufacturer Part Number
DS1220Y-200IND+
Description
IC NVSRAM 16KBIT 200NS 24DIP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS1220Y-200IND+

Format - Memory
RAM
Memory Type
NVSRAM (Non-Volatile SRAM)
Memory Size
16K (2K x 8)
Speed
200ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
24-DIP (600 mil) Module
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
FEATURES
 10 years minimum data retention in the
 Data is automatically protected during power
 Directly replaces 2k x 8 volatile static RAM
 Unlimited write cycles
 Low-power CMOS
 JEDEC standard 24-pin DIP package
 Read and write access times of 100 ns
 Full ±10% operating range
 Optional industrial temperature range of
DESCRIPTION
The DS1220Y 16k Nonvolatile SRAM is a 16,384-bit, fully static, nonvolatile RAM organized as 2048
words by 8 bits. Each NV SRAM has a self-contained lithium energy source and control circuitry that
constantly monitor V
energy source is automatically switched on and write protection is unconditionally enabled to prevent
data corruption. The NV SRAM can be used in place of existing 2k x 8 SRAMs directly conforming to
the popular bytewide 24-pin DIP standard. The DS1220Y also matches the pinout of the 2716 EPROM or
the 2816 EEPROM, allowing direct substitution while enhancing performance. There is no limit on the
number of write cycles that can be executed and no additional support circuitry is required for
microprocessor interfacing.
www.maxim-ic.com
19-5579; Rev 10/10
absence of external power
loss
or EEPROM
-40°C to +85°C, designated IND
CC
for an out-of-tolerance condition. When such a condition occurs, the lithium
1 of 9
NOT RECOMMENDED FOR NEW DESIGNS
PIN ASSIGNMENT
PIN DESCRIPTION
A0-A10
DQ0-DQ7
V
GND
CE
WE
OE
CC
24-Pin ENCAPSULATED PACKAGE
GND
DQ0
DQ1
DQ2
16k Nonvolatile SRAM
A7
A6
A5
A4
A3
A2
A1
A0
720-mil EXTENDED
1
2
3
4
5
6
7
8
9
10
11
12
- Address Inputs
- Data In/Data Out
- Chip Enable
- Write Enable
- Output Enable
- Power (+5V)
- Ground
24
23
22
21
20
19
18
17
16
15
14
13
VCC
WE
A8
A9
OE
A10
CE
DQ7
DQ6
DQ5
DQ4
DQ3
DS1220Y

Related parts for DS1220Y-200IND+

DS1220Y-200IND+ Summary of contents

Page 1

... The NV SRAM can be used in place of existing SRAMs directly conforming to the popular bytewide 24-pin DIP standard. The DS1220Y also matches the pinout of the 2716 EPROM or the 2816 EEPROM, allowing direct substitution while enhancing performance. There is no limit on the number of write cycles that can be executed and no additional support circuitry is required for microprocessor interfacing ...

Page 2

... OE WRITE MODE The DS1220Y executes a write cycle whenever the WE and CE signals are active (low) after address inputs are stable. The later-occurring falling edge will determine the start of the write cycle. The write cycle is terminated by the earlier rising edge All address inputs must be kept valid throughout the write cycle ...

Page 3

... SYMBOL MIN TYP I -0.3V to +6.0V 0°C to +70°C -40°C to +85°C -40°C to +85°C +260° See Note 10) A MAX UNITS NOTES 5 ± 10%) CC MAX UNITS NOTES µA +1.0 µA +1 3.0 7.0 mA 2.0 4 +25°C) A MAX UNITS NOTES DS1220Y ...

Page 4

... Output High-Z from WE Output Active from WE Data Setup Time Data Hold Time (T : See Note 10 DS1220Y-100 SYM MIN MAX t 100 RC t 100 ACC 100 COE 100 WR1 t 10 WR2 t 35 ODW t 5 OEW DH1 t 10 DH2 DS1220Y = 5.0V ± 10%) CC UNITS NOTES ...

Page 5

... NOT RECOMMENDED FOR NEW DESIGNS READ CYCLE SEE NOTE 1 WRITE CYCLE 1 SEE NOTES AND 12 WRITE CYCLE 2 SEE NOTES AND DS1220Y ...

Page 6

... These parameters are sampled with load and are not 100% tested. SYMBOL MIN 100 REC SYMBOL MIN during a write cycle, the output buffers remain in a high impedance IH is measured from the latter DS1220Y MAX UNITS NOTES µs µs µ +25°C) A MAX UNITS NOTES years 11 9 ...

Page 7

... low or the WE low transition occurs prior to or simultaneously with the CE low transition, the output buffers remain in a high impedance state during this period. 9. Each DS1220Y is marked with a 4-digit date code AABB. AA designates the year of manufacture. BB designates the week of manufacture. The expected t manufacture ...

Page 8

... PACKAGE CODE 24 DIP OUTLINE NO. MDT24+3 21-0245 PKG DIM DS1220Y LAND PATTERN NO.  24-PIN MIN MAX 1.320 1.340 33.53 34.04 0.695 0.720 17.65 18.29 0.390 0.415 9.91 10.54 0.100 0.130 2.54 3.30 0.017 0.030 0.43 0.76 0.120 ...

Page 9

... Maximr cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time © 2010 Maxim Integrated Products DESCRIPTION Maxim and the Dallas logos are registered trademarks of Maxim Integrated Products, Inc. DS1220Y PAGES CHANGED ...

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