DS1249Y-70# Maxim Integrated Products, DS1249Y-70# Datasheet - Page 2

• Manufacturer Part Number: DS1249Y-70#
• Description: IC NVSRAM 2MBIT 70NS 32DIP
• Manufacturer: Maxim Integrated Products

Specifications of DS1249Y-70#

• Format - Memory: RAM
• Memory Type: NVSRAM (Non-Volatile SRAM)
• Memory Size: 2M (256K x 8)
• Speed: 70ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 32-DIP Module (600 mil), 32-EDIP
• Data Bus Width: 8 bit
• Organization: 256 K x 8
• Interface Type: Parallel
• Access Time: 70 ns
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Operating Current: 85 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: Through Hole
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

READ MODE
The DS1249 devices execute a read cycle whenever
Enable) and
(A
data output drivers within t
must be measured from the later-occurring signal (
WRITE MODE
The DS1249 executes a write cycle whenever the
inputs are stable. The later-occurring falling edge of
The write cycle is terminated by the earlier rising edge of
valid throughout the write cycle.
before another cycle can be initiated. The
cycles to avoid bus contention. However, if the output drivers are enabled (
will disable the outputs in t
DATA RETENTION MODE
The DS1249AB provides full functional capability for V
4.5 volts. The DS1249Y provides full-functional capability for V
protects by 4.25 volts. Data is maintained in the absence of V
The nonvolatile static RAMs constantly monitor V
automatically write protects themselves, all inputs become “don’t care,” and all outputs become high
impedance. As V
energy source to RAM to retain data. During power-up, when V
the power switching circuit connects external V
Normal RAM operation can resume after V
DS1249Y.
FRESHNESS SEAL
Each DS1249 device is shipped from Maxim with its lithium energy source disconnected, guaranteeing
full energy capacity. When V
enabled for battery backup operation.
CE
CE
0
- A
and
or t
17
OE
) defines which of the 262,144 bytes of data is accessed. Valid data will be available to the eight
OE
for
access times are also satisfied. If
OE
OE
(Output Enable) are active (low). The unique address specified by the 18 address inputs
CC
rather than t
falls below approximately 3.0 volts, a power switching circuit connects the lithium
ODW
ACC
ACC
CC
from its falling edge.
(Access Time) after the last address input signal is stable, providing that
is first applied at a level greater than V
.
WE
must return to the high state for a minimum recovery time (t
OE
CC
exceeds 4.75 volts for the DS1249AB and 4.5 volts for the
OE
control signal should be kept inactive (high) during write
CC
2 of 9
to the RAM and disconnects the lithium energy source.
and
CE
CC
CE
WE
WE
. Should the supply voltage decay, the NV SRAMs
CE
or
or WE will determine the start of the write cycle.
CC
(Write Enable) is inactive (high) and
and
OE
access times are not satisfied, then data access
CE
greater than 4.75 volts and write protects by
) and the limiting parameter is either t
CC
CE
or
without any additional support circuitry.
CC
signals are active (low) after address
WE
CC
rises above approximately 3.0 volts,
. All address inputs must be kept
greater than 4.5 volts and write
TP
, the lithium energy source is
CE
and
OE
active) then
DS1249Y/AB
CE
CO
(Chip
WE
WR
for
)