AT45DB321C-TC Atmel, AT45DB321C-TC Datasheet - Page 9

IC FLASH 32MBIT 40MHZ 28TSOP

AT45DB321C-TC

Manufacturer Part Number
AT45DB321C-TC
Description
IC FLASH 32MBIT 40MHZ 28TSOP
Manufacturer
Atmel
Datasheet

Specifications of AT45DB321C-TC

Format - Memory
FLASH
Memory Type
DataFLASH
Memory Size
32M (8192 pages x 528 bytes)
Speed
40MHz
Interface
SPI, 3-Wire Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
28-TSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
6. Sector Protection
6.1
3387M–DFLASH–2/08
Software Sector Protection
Main Memory Page Program without Built-in Erase, Page Erase, Block Erase, Main Memory
Page Program, and Auto Page Rewrite.
Bit 1 in the Status Register is used to provide information to the user whether or not the sector
protection has been enabled or disabled, either by software-controlled method or hardware-con-
trolled method. A logic 1 indicates that sector protection has been enabled and logic 0 indicates
that sector protection has been disabled.
The device density is indicated using bits 5, 4, 3, and 2 of the status register. For the
AT45DB321C, the four bits are 1,1, 0, 1. The decimal value of these four binary bits does not
equate to the device density; the four bits represent a combinational code relating to differing
densities of DataFlash devices. The device density is not the same as the density code indicated
in the JEDEC device ID information. The device density is provided only for backward
compatibility.
The result of the most recent Main Memory Page to Buffer Compare operation is indicated using
bit 6 of the status register. If bit 6 is a 0, then the data in the main memory page matches the
data in the buffer. If bit 6 is a 1, then at least one bit of the data in the main memory page does
not match the data in the buffer.
Table 5-2.
Two protection methods, hardware and software controlled, are provided. The selection of which
sectors to be protected/unprotected from program and erase operations is defined in the Sector
Protection Register.
Sectors specified for protection in the Sector Protection Register can be protected from program
and erase operations by issuing the Enable Sector Protection command. To enable the sector
protection using the software controlled method, the CS pin must first be asserted as it would be
with any other command. Once the CS pin has been asserted, the appropriate 4-byte command
sequence must be clocked in via the input pin (SI). After the last bit of the command sequence
has been clocked in, the CS pin must be deasserted after which the sector protection will be
enabled.
To disable the sector protection using the software controlled method, the CS pin must first be
asserted as it would be with any other command. Once the CS pin has been asserted, the
appropriate 4-byte sequence for the Disable Sector Protection command must be clocked in via
the input pin (SI). After the last bit of the command sequence has been clocked in, the CS pin
must be deasserted after which the sector protection will be disabled. The Disable Sector Pro-
tection command is ignored while the WP pin is asserted.
Command
Enable Sector Protection
Disable Sector Protection
Read Sector Protection Register
RDY/BUSY
Bit 7
Status Register Format
COMP
Bit 6
Bit 5
1
Byte 1
3DH
3DH
32H
Bit 4
1
Byte 2
Bit 3
2AH
2AH
00H
0
Bit 2
1
AT45DB321C
Byte 3
7FH
7FH
00H
Protect
Bit 1
Byte 4
A9H
9AH
00H
Bit 0
X
9

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