MT46V32M8FG-75 L:G TR Micron Technology Inc, MT46V32M8FG-75 L:G TR Datasheet - Page 83

• Manufacturer Part Number: MT46V32M8FG-75 L:G TR
• Description: IC DDR SDRAM 256MBIT 60FBGA
• Manufacturer: Micron Technology Inc

Specifications of MT46V32M8FG-75 L:G TR

• Format - Memory: RAM
• Memory Type: DDR SDRAM
• Memory Size: 256M (32M x 8)
• Speed: 7.5ns
• Interface: Parallel
• Voltage - Supply: 2.3 V ~ 2.7 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 60-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Figure 46:
PDF: 09005aef80768abb/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 256Mb DDR: Rev. O, Core DDR: Rev. B 1/09 EN
Command
Address
t DQSS (NOM)
t DQSS (MIN)
t DQSS (MAX)
DQS
DQS
DQS
CK#
DM
DM
DM
DQ
DQ
DQ
CK
WRITE-to-PRECHARGE – Interrupting
Bank a,
Notes:
WRITE
Col b
T0
t DQSS
t DQSS
t DQSS
1. DI b = data-in for column b.
2. Subsequent element of data-in is applied in the programmed order following DI b.
3. An interrupted burst of 8 is shown; two data elements are written.
4.
5. A10 is LOW with the WRITE command (auto precharge is disabled).
6. DQS is required at T4 and T4n (nominal case) to register DM.
7. If the burst of 4 is used, DQS and DM are not required at T3, T3n, T4, and T4n.
t
DI
b
WR is referenced from the first positive CK edge after the last data-in pair.
NOP
DI
T1
b
DI
b
T1n
NOP
T2
T2n
t WR
81
NOP
T3
T3n
Micron Technology, Inc., reserves the right to change products or specifications without notice.
(a or all)
Bank,
PRE
T4
256Mb: x4, x8, x16 DDR SDRAM
T4n
Transitioning Data
T5
NOP
©2003 Micron Technology, Inc. All rights reserved.
t RP
T6
NOP
Operations
Don’t Care