IS24C128-3ZI-TR ISSI, Integrated Silicon Solution Inc, IS24C128-3ZI-TR Datasheet

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IS24C128-3ZI-TR

Manufacturer Part Number
IS24C128-3ZI-TR
Description
IC EEPROM 128KBIT 1MHZ 14TSSOP
Manufacturer
ISSI, Integrated Silicon Solution Inc
Datasheet

Specifications of IS24C128-3ZI-TR

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
128K (16K x 8)
Speed
400kHz, 1MHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
14-TSSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
FEATURES
• Organization:
• 64-Byte Page Write Buffer
• Two-Wire Serial Interface
• Low Power CMOS Technology
• Low Voltage Operation
• 400 KHz (I
• Hardware Data Protection
• Sequential Read Feature
• Filtered Inputs for Noise Suppression
• Self time Write cycle with auto clear
• High Reliability
• Industrial and Automotive temperature ranges
• 8-pin PDIP and 8-pin SOIC
• Lead-free available
Integrated Silicon Solution, Inc. — www.issi.com
Rev. C
05/08/07
IS24C128
128K-bit 2-WIRE SERIAL
CMOS EEPROM
Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability
arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any
published information and before placing orders for products.
– 16K-bit x 8-bit
– Bi-directional data transfer protocol
– Active Current less than 2 mA (5V)
– Standby Current less than 5 µA (5V)
– Standby Current less than 2 µA (2.5V)
– IS24C128-3: Vcc = 2.5V to 5.5V
– Write Protect pin
– 5 ms @ 2.5V
– Endurance: 100,000 Cycles
– Data Retention: 40 Years
2
C Protocol) Compatibility
The IS24C128 is an electrically erasable PROM device
that uses the standard 2-wire interface for
communications. The IS24C128 contains a memory
array of 128K-bits (16,384 x 8), and is further
subdivided into 256 pages of 64 bytes each for page-
write mode. This EEPROM is offered in operating
voltages of 2.5V to 5.5V (IS24C128-3) to be compatible
with most application voltages. ISSI designed the
IS24C128 to be a low-cost and low-power 2-wire
EEPROM solution. The devices are packaged in 8-pin
PDIP and 8-pin SOIC.
The IS24C128 maintains compatibility with the popular
2-wire bus protocol, so it is easy to design into
applications implementing this bus type. The simple
bus consists of the Serial Clock wire (SCL) and the
Serial Data wire (SDA). Using the bus, a Master
device such as a microcontroller is usually connected
to one or more Slave devices such as the IS24C128.
The bit stream over the SDA line includes a series of
bytes, which identifies a particular Slave device, an
instruction, an address within that Slave device, and a
series of data, if appropriate. The IS24C128 has a
Write Protect pin (WP) to allow blocking of any write
instruction transmitted over the bus.
DESCRIPTION
MAY 2007
1

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IS24C128-3ZI-TR Summary of contents

Page 1

... Serial Clock wire (SCL) and the Serial Data wire (SDA). Using the bus, a Master device such as a microcontroller is usually connected to one or more Slave devices such as the IS24C128. The bit stream over the SDA line includes a series of bytes, which identifies a particular Slave device, an instruction, an address within that Slave device, and a series of data, if appropriate ...

Page 2

... IS24C128 FUNCTIONAL BLOCK DIAGRAM Vcc SDA SCL WP SLAVE ADDRESS REGISTER & COMPARATOR GND nMOS 2 CONTROL LOGIC WORD ADDRESS COUNTER ACK Clock Integrated Silicon Solution, Inc. — www.issi.com HIGH VOLTAGE GENERATOR, TIMING & CONTROL EEPROM ARRAY Y DECODER > DATA DI/O REGISTER Rev. C 05/08/07 ...

Page 3

... IS24C128 PIN CONFIGURATION 8-Pin DIP and SOIC GND 4 5 PIN DESCRIPTIONS A0-A1 Address Inputs SDA Serial Address/Data I/O SCL Serial Clock Input WP Write Protect Input Vcc Power Supply NC No Connect GND Ground SCL This input clock pin is used to synchronize the data transfer to and from the device ...

Page 4

... After a successful data transfer, each receiving device is required to generate an ACK. The Acknowledging device pulls down the SDA line. Reset The IS24C128 contains a reset function in case the 2- wire bus transmission is accidentally interrupted (eg. a power loss), or needs to be terminated mid-stream. The reset is caused when the Master device creates a Start condition ...

Page 5

... IS24C128 initiates the internal Write cycle. ACK polling can be initiated immediately. This involves issuing the Start condition followed by the Slave address for a Write operation. If the IS24C128 is still busy with the Write operation, no ACK will be returned. If the IS24C128 has completed the Write operation, an ACK will be returned and the host can then proceed with the next Read or Write operation ...

Page 6

... Figure 1. Typical System Bus Configuration SDA SCL Figure 2. Output Acknowledge SCL from Master Data Output from Transmitter Data Output from Receiver Figure 3. Start and Stop Conditions SCL SDA 6 Vcc Master IS24C128 Transmitter/ Receiver Integrated Silicon Solution, Inc. — www.issi.com ACK Rev. C 05/08/07 ...

Page 7

... IS24C128 Figure 4. Data Validity Protocol SCL SDA Figure 5. Slave Address BIT Figure 6. Byte Write Device R Address T SDA Bus Activity Figure 7. Page Write Device R T Word Address (n) Address T E SDA A Bus Activity R/W Integrated Silicon Solution, Inc. — www.issi.com Rev. C 05/08/07 Data Change ...

Page 8

... IS24C128 Figure 8. Current Address Read Activity Figure 9. Random Address Read Device R T Address T E SDA A Bus Activity R/W DUMMY WRITE Figure 10. Sequential Read R E Device A Address D SDA A Bus C Activity K R Device A T Address D Data SDA A Bus R Word Word R Address (n) Address ( Data Byte n ...

Page 9

... This is a stress rating only. Functional operation of the device outside these conditions or those indicated in the operational sections of this specification is not implied. Exposure to these conditions for extended periods may affect reliability. OPERATING RANGE (IS24C128-3) Range Ambient Temperature Industrial – ...

Page 10

... IS24C128 DC ELECTRICAL CHARACTERISTICS Industrial ( +85 C), Automotive ( Symbol Parameter V Output Low Voltage OL V Input High Voltage IH V Input Low Voltage IL I Input Leakage Current LI I Output Leakage Current LO Notes: V min and V max are reference only and are not tested POWER SUPPLY CHARACTERISTICS ...

Page 11

... IS24C128 AC ELECTRICAL CHARACTERISTICS Industrial ( +85 C), Automotive ( Symbol Parameter f SCL Clock Frequency SCL (1) T Noise Suppression Time t Clock Low Period Low t Clock High Period High t Bus Free Time Before New Transmission BUF t Start Condition Setup Time SU:STA t Stop Condition Setup Time SU:STO ...

Page 12

... IS24C128 AC WAVEFORMS Figure 11. Bus Timing SCL t SU:STA SDA IN SDA OUT WP Figure 12. Write Cycle Timing SCL 8th BIT SDA WORD HIGH LOW t HD:DAT t t HD:STA SU:DAT ACK t WR STOP Condition Integrated Silicon Solution, Inc. — www.issi.com t SU:STO t BUF t SU:WP t HD:WP START Condition Rev ...

Page 13

... Integrated Silicon Solution, Inc. — www.issi.com Rev. C 05/08/07 Part Number Package IS24C128-3PI 300-mil Plastic DIP (8-pin) IS24C128-3GI Small Outline (JEDEC STD) (8-pin) Part Number Package IS24C128-3PLI 300-mil Plastic DIP (8-pin) IS24C128-3GLI Small Outline (JEDEC STD) (8-pin) Part Number Package IS24C128-3GLA3 Small Outline (JEDEC STD) (8-pin) 13 ...

Page 14

PACKAGING INFORMATION 150-mil Plastic SOP Package Code 150-mil Plastic SOP (G, GR) Symbol Min Max Ref. Std. Inches No. Leads 8 A — 0.068 A1 0.004 0.009 B 0.013 0.020 C 0.007 0.010 D ...

Page 15

PACKAGING INFORMATION 300-mil Plastic DIP Package Code: N FOR 32-PIN ONLY MILLIMETERS Sym. Min. Max. Min. N0. Leads 8 A 4.57 3.68 0.145 A1 — 0.38 0.015 B 0.56 0.36 0.014 B1 1.52 1.14 0.045 ...

Page 16

PACKAGING INFORMATION 300-mil Plastic DIP Package Code: N,P MILLIMETERS INCHES Sym. Min. Max. Min. N0. Leads 16 A 4.57 3.68 0.145 A1 — 0.25 0.010 B 0.46 BSC 0.018 BSC B1 1.52 BSC 0.060 BSC B2 — — — C ...

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