CY7C185-15VC Cypress Semiconductor Corp, CY7C185-15VC Datasheet - Page 4

IC SRAM 64KBIT 15NS 28SOJ

CY7C185-15VC

Manufacturer Part Number
CY7C185-15VC
Description
IC SRAM 64KBIT 15NS 28SOJ
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C185-15VC

Format - Memory
RAM
Memory Type
SRAM - Asynchronous
Memory Size
64K (8K x 8)
Speed
15ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
28-SOJ
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1052

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Switching Characteristics
Document #: 38-05043 Rev. *A
Read Cycle
t
t
t
t
t
t
t
t
t
t
t
t
t
Write Cycle
t
t
t
t
t
t
t
t
t
t
t
Notes:
RC
AA
OHA
ACE1
ACE2
DOE
LZOE
HZOE
LZCE1
LZCE2
HZCE
PU
PD
WC
SCE1
SCE2
AW
HA
SA
PWE
SD
HD
HZWE
LZWE
6.
7.
8.
9.
Parameter
Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
I
t
At any given temperature and voltage condition, t
The internal write time of the memory is defined by the overlap of CE
signal can terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write.
OL
HZOE,
/I
OH
t
HZCE
and 30-pF load capacitance.
[9]
, and t
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE
CE
OE LOW to Data Valid
OE LOW to Low Z
OE HIGH to High Z
CE
CE
CE
CE
CE
CE
CE
CE
Write Cycle Time
CE
CE
Address Set-up to Write End
Address Hold from Write End
Address Set-up to Write Start
WE Pulse Width
Data Set-up to Write End
Data Hold from Write End
WE LOW to High Z
WE HIGH to Low Z
1
2
1
2
1
2
1
2
1
2
1
2
HZWE
LOW to Power-Down
LOW to Data Valid
HIGH to Data Valid
LOW to Low Z
HIGH to Low Z
HIGH to High Z
LOW to High Z
LOW to Power-Up
to HIGH to Power-Up
HIGH to Power-Down
LOW to Write End
HIGH to Write End
are specified with C
Description
Over the Operating Range
[8]
[7]
[7]
[7, 8]
L
= 5 pF as in part (b) of AC Test Loads. Transition is measured 500 mV from steady state voltage.
HZCE
is less than t
Min.
15
15
12
12
12
12
7C185-15
3
3
3
3
0
0
0
8
0
3
LZCE1
1
LOW, CE
[6]
Max.
and t
15
15
15
15
8
7
7
7
2
LZCE2
HIGH, and WE LOW. All 3 signals must be active to initiate a write and either
Min.
for any given device.
20
20
15
15
15
15
10
7C185-20
5
3
5
3
0
0
0
0
5
Max.
20
20
20
20
9
8
8
7
Min.
25
25
20
20
20
15
10
7C185-25
5
3
5
3
0
0
0
0
5
Max.
25
25
25
12
10
10
20
7
Min.
35
35
20
20
25
20
12
7C185-35
5
3
5
3
0
0
0
0
5
CY7C185
Max.
35
35
35
15
10
10
20
8
Page 4 of 11
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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