CY62148BLL-70SC Cypress Semiconductor Corp, CY62148BLL-70SC Datasheet

IC SRAM 4MBIT 70NS 32SOIC

CY62148BLL-70SC

Manufacturer Part Number
CY62148BLL-70SC
Description
IC SRAM 4MBIT 70NS 32SOIC
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY62148BLL-70SC

Format - Memory
RAM
Memory Type
SRAM
Memory Size
4M (512K x 8)
Speed
70ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
32-SOIC (11.30mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1075

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY62148BLL-70SC
Manufacturer:
CYPRESS
Quantity:
1 480
Cypress Semiconductor Corporation
Document #: 38-05039 Rev. *C
Features
Functional Description
The CY62148B is a high-performance CMOS static RAM
organized as 512K words by 8 bits. Easy memory expansion
• High Speed: 70 ns
• 4.5V–5.5V operation
• Low active power
• Low standby current
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE and OE features
• CMOS for optimum speed/power
• Available in standard 32-lead (450-mil) SOIC, 32-lead
Logic Block Diagram
WE
CE
OE
— Typical active current: 2.5 mA @ f = 1 MHz
— Typical active current: 12.5 mA @ f = f
TSOP II and 32-lead Reverse TSOP II packages
A
A
A
A
A
A
A
A
A
A
12
14
16
17
5
6
7
0
1
4
INPUT BUFFER
512 K x 8
DECODER
COLUMN
ARRAY
POWER
DOWN
max
198 Champion Court
(70 ns)
is provided by an active LOW Chip Enable (CE), an active
LOW Output Enable (OE), and three-state drivers. This device
has an automatic power-down feature that reduces power
consumption by more than 99% when deselected.
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. Data on the eight I/O
pins (I/O
specified on the address pins (A
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing Write
Enable (WE) HIGH for read. Under these conditions, the
contents of the memory location specified by the address pins
will appear on the I/O pins.
The eight input/output pins (I/O
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), or during a write
operation (CE LOW, and WE LOW).
The CY62148B is available in a standard 32-pin 450-mil-wide
body width SOIC, 32-pin TSOP II, and 32-pin Reverse TSOP
II packages.
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
4-Mbit (512K x 8) Static RAM
0
1
2
3
4
5
6
7
0
San Jose
through I/O
,
CA 95134-1709
7
) is then written into the location
CY62148B MoBL™
Pin Configuration
GND
GND
A
A
A
I/O
I/O
I/O
0
A
I/O
I/O
I/O
A
12
14
16
A
A
A
A
A
A
A
A
A
A
A
17
0
Revised August 2, 2006
A
A
A
A
A
A
A
through I/O
17
A
16
14
12
1
2
3
4
5
6
7
0
2
1
0
6
5
4
3
2
1
0
through A
0
1
2
7
4
3
2
1
16
15
14
13
12
11
10
9
8
7
6
5
13
14
15
16
1
2
3
4
5
6
7
8
9
10
11
12
Top View
Top View
TSOP II
TSOP II
Reverse
SOIC
18
7
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
) are placed in a
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
).
408-943-2600
A
A
CE
I/O
I/O
I/O
I/O
I/O
I/O
V
A
WE
A
A
A
A
OE
OE
I/O
I/O
I/O
I/O
CE
A
A
I/O
A
A
A
A
A
V
CC
18
9
10
WE
15
13
8
11
6
7
5
4
3
10
11
9
8
13
18
15
cc
5
7
3
4
6

Related parts for CY62148BLL-70SC

CY62148BLL-70SC Summary of contents

Page 1

... COLUMN CE DECODER WE OE Cypress Semiconductor Corporation Document #: 38-05039 Rev. *C 4-Mbit (512K x 8) Static RAM is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and three-state drivers. This device has an automatic power-down feature that reduces power consumption by more than 99% when deselected. ...

Page 2

... Product Portfolio V CC Product Min. Typ. CY62148BLL 4.5 V 5.0V Maximum Ratings (Above which the useful life may be impaired. For user guide- lines, not tested.) Storage Temperature ................................. –65°C to +150°C Ambient Temperature with Power Applied............................................. –55°C to +125°C Supply Voltage Relative GND........ – ...

Page 3

Capacitance Parameter Description C Input Capacitance IN C Output Capacitance OUT AC Test Loads and Waveforms R1 1800 Ω 5V OUTPUT OUTPUT R2 100 pF 990 Ω INCLUDING JIG AND SCOPE (a) Note: 4. Tested initially and after any ...

Page 4

... HZWE 8. The internal write time of the memory is defined by the overlap of CE LOW, and WE LOW. CE and WE must be LOW to initiate a write, and the transition of any of these signals can terminate the write. The input data set-up and hold timing should be referenced to the leading edge of the signal that terminates the write. ...

Page 5

Data Retention Characteristics Parameter Description V V for Data Retention Data Retention Current CCDR [4] t Chip Deselect to Data Retention Time CDR [9] t Operation Recovery Time R Data Retention Waveform Switching Waveforms ...

Page 6

Switching Waveforms (continued) Write Cycle No. 1 (CE Controlled) ADDRESS CE WE DATA I/O Write Cycle No. 2 (WE Controlled, OE HIGH During Write) ADDRESS DATA I/O NOTE 15 t HZOE Notes: 13. If ...

Page 7

... WE I High Data Out Data High Z Ordering Information Speed Ordering Code (ns) 70 CY62148BLL-70SC CY62148BLL-70ZC CY62148BLL-70ZRC CY62148BLL-70SI CY62148BLL-70ZI CY62148BLL-70ZRI Please contact your local Cypress sales representative for availability of these parts Document #: 38-05039 Rev. *C [13, 14 SCE PWE t HZWE – I/O Mode 0 7 Power-Down ...

Page 8

Package Diagrams Document #: 38-05039 Rev. *C 32-lead (450 MIL) Molded SOIC (51-85081) CY62148B MoBL™ 51-85081-A Page ...

Page 9

Package Diagrams (continued) 32-lead Thin Small Outline Package Type II (51-85095) All products and company names mentioned in this document may be the trademarks of their respective holders. Document #: 38-05039 Rev. *C CY62148B MoBL™ 51-85095-** Page ...

Page 10

... Document #: 38-05039 Rev. *C © Cypress Semiconductor Corporation, 2006. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress ...

Page 11

... MGN Remove 55-ns devices VKN Changed address of Cypress Semiconductor Corporation on Page# 1 from “3901 North First Street” to “198 Champion Court” Corrected the typo in the Array size in the Logic Block Diagram on page# 1 Renamed Package Name column with Package Diagram in the Ordering Information Table CY62148B MoBL™ ...

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