CY7C1383B-100AC Cypress Semiconductor Corp, CY7C1383B-100AC Datasheet - Page 17

• Manufacturer Part Number: CY7C1383B-100AC
• Description: IC SRAM 18MBIT 100MHZ 100LQFP
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1383B-100AC

• Format - Memory: RAM
• Memory Type: SRAM - Synchronous
• Memory Size: 18M (1M x 18)
• Speed: 100MHz
• Interface: Parallel
• Voltage - Supply: 3.135 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1139

Identification Register Definitions
Scan Register Sizes
Identification Codes
Document #: 38-05196 Rev. **
Revision Number (31:28)
Device Depth (27:23)
Device Width (22:18)
Cypress Device ID (17:12)
Cypress JEDEC ID (11:1)
ID Register Presence (0)
Instruction
Bypass
ID
Boundary Scan
EXTEST
IDCODE
SAMPLE Z
RESERVED
SAMPLE/PRELOAD
RESERVED
RESERVED
BYPASS
Instruction Field
Instruction
Register Name
000
001
010
011
100
101
110
111
Code
00011100100
512K × 36
00100
00111
xxxxx
xxxx
1
Captures the I/O ring contents. Places the boundary scan register
between the TDI and TDO. Forces all SRAM outputs to High-Z state. This
instruction is not 1149.1-compliant.
Loads the ID register with the vendor ID code and places the register
between TDI and TDO. This operation does not affect SRAM operation.
Captures the I/O contents. Places the boundary scan register between TDI
and TDO. Forces all SRAM output drivers to a High-Z state.
Do Not Use. This instruction is reserved for future use.
Captures the I/O ring contents. Places the boundary scan register be-
tween TDI and TDO. Does not affect the SRAM operation. This instruction
does not implement 1149.1 preload function and is therefore not
1149.1-compliant.
Do Not Use. This instruction is reserved for future use.
Do Not Use. This instruction is reserved for future use.
Places the bypass register between TDI and TDO. This operation does
not affect SRAM operation.
Bit Size (×18)
00011100100
32
51
3
1
1M × 18
01000
00011
xxxxx
xxxx
1
Reserved for version number.
Defines depth of SRAM. 512K or 1M
Defines with of the SRAM. ×36 or ×18
Reserved for future use.
Allows unique identification of SRAM vendor.
Indicate the presence of an ID register.
Description
Description
Bit Size (×36)
32
70
3
1
CY7C1381B
CY7C1383B
Page 17 of 31