PSD834F2-70J STMicroelectronics, PSD834F2-70J Datasheet - Page 44

IC FLASH 2MBIT 70NS 52PLCC

PSD834F2-70J

Manufacturer Part Number
PSD834F2-70J
Description
IC FLASH 2MBIT 70NS 52PLCC
Manufacturer
STMicroelectronics
Datasheet

Specifications of PSD834F2-70J

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
2M (256K x 8)
Speed
70ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
52-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-2004-5

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PSD813F2V, PSD854F2V
PSD Interface to a Multiplexed 8-Bit Bus
Figure
MCU with an 8-bit multiplexed bus and a PSD. The
ADIO port on the PSD is connected directly to the
MCU address/data bus. Address Strobe (ALE/AS,
PD0) latches the address signals internally.
Latched addresses can be brought out to Port A or
Figure 19. An Example of a Typical 8-bit Multiplexed Bus Interface
44/109
19
RESET
MCU
shows an example of a system using a
BHE
ALE
WR
RD
AD [ 7:0 ]
A [ 15:8 ]
Doc ID 10552 Rev 3
B. The PSD drives the ADIO data bus only when
one of its internal resources is accessed and Read
Strobe (RD, CNTL1) is active. Should the system
address bus exceed sixteen bits, Ports A, B, C, or
D may be used as additional address inputs.
PSD
WR ( CNTRL0 )
RD ( CNTRL1 )
BHE ( CNTRL2 )
RST
ALE ( PD0 )
PORT D
PORT
ADIO
PORT
PORT
PORT
A
B
C
( OPTIONAL )
( OPTIONAL )
A [ 7: 0 ]
A [ 15: 8 ]
AI02878C

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