M93C66-WMN6 STMicroelectronics, M93C66-WMN6 Datasheet - Page 18

IC EEPROM 4KBIT 2MHZ 8SOIC

M93C66-WMN6

Manufacturer Part Number
M93C66-WMN6
Description
IC EEPROM 4KBIT 2MHZ 8SOIC
Manufacturer
STMicroelectronics
Datasheet

Specifications of M93C66-WMN6

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
4K (512 x 8 or 256 x 16)
Speed
2MHz
Interface
Microwire, 3-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
497-1934-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M93C66-WMN6
Manufacturer:
ST
0
Part Number:
M93C66-WMN6P
Manufacturer:
STM
Quantity:
2
Part Number:
M93C66-WMN6P
Manufacturer:
ST
Quantity:
1 000
Part Number:
M93C66-WMN6P
Manufacturer:
ST
Quantity:
20 000
Part Number:
M93C66-WMN6PT
Manufacturer:
ST
0
Part Number:
M93C66-WMN6Q
Manufacturer:
ST
0
Part Number:
M93C66-WMN6T
Manufacturer:
ST
Quantity:
881
Part Number:
M93C66-WMN6T
Manufacturer:
ST
Quantity:
20 000
Part Number:
M93C66-WMN6TP
Manufacturer:
ST
Quantity:
50 000
Part Number:
M93C66-WMN6TP
Manufacturer:
ST
Quantity:
220
Part Number:
M93C66-WMN6TP
Manufacturer:
ST
Quantity:
20 000
Part Number:
M93C66-WMN6TP
0
READY/BUSY status
6
7
8
18/36
READY/BUSY status
While the Write or Erase cycle is underway, for a WRITE, ERASE, WRAL or ERAL
instruction, the Busy signal (Q=0) is returned whenever Chip Select input (S) is driven high.
(Please note, though, that there is an initial delay, of t
becomes available). In this state, the M93Cx6 ignores any data on the bus. When the Write
cycle is completed, and Chip Select Input (S) is driven high, the Ready signal (Q=1)
indicates that the M93Cx6 is ready to receive the next instruction. Serial Data Output (Q)
remains set to 1 until the Chip Select Input (S) is brought low or until a new start bit is
decoded.
Initial delivery state
The device is delivered with all bits in the memory array set to 1 (each byte contains FFh).
Common I/O operation
Serial Data Output (Q) and Serial Data Input (D) can be connected together, through a
current limiting resistor, to form a common, single-wire data bus. Some precautions must be
taken when operating the memory in this way, mostly to prevent a short circuit current from
flowing when the last address bit (A0) clashes with the first data bit on Serial Data Output
(Q). Please see the application note AN394 for details.
Doc ID 4997 Rev 11
M93C86, M93C76, M93C66, M93C56, M93C46
SLSH
, before this status information

Related parts for M93C66-WMN6