XCF128XFTG64C Xilinx Inc, XCF128XFTG64C Datasheet - Page 50

• Manufacturer Part Number: XCF128XFTG64C
• Description: IC PROM SRL 128M GATE 64-FTBGA
• Manufacturer: Xilinx Inc

Specifications of XCF128XFTG64C

• Memory Size: 128Mb
• Programmable Type: In System Programmable
• Voltage - Supply: 1.7 V ~ 2 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TBGA
• Access Time: 85ns
• Supply Voltage Range: 1.7V To 2V
• Memory Case Style: FTBGA
• No. Of Pins: 64
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Package /: RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1578

Table 29: Synchronous Read AC Characteristics
DS617 (v3.0.1) January 07, 2010
Product Specification
Notes:
1.
2.
3.
4.
Sampled only, not 100% tested.
For other timings, refer to
Parameter applies when READY_WAIT is configured (CR4) with the output WAIT function.
The minimum system clock period is T
Symbol
R
T
T
T
T
T
T
T
T
T
T
T
T
T
KHQV
T
KHKH
EHTZ
KHTV
KHTX
ELTV
AVKH
KHQX
ELKH
EHEL
KHAX
KHKL
KLKH
LLKH
T
T
F
R
(3)
(3)
(3)
(3)
(4)
(4)
T
T
T
T
T
T
ADVLCLKH
Table 28, page
AVCLKH
CLKHAX
CLKHQV
CLKHQX
ELCLKH
T
Alt
CLK
Address Valid to Clock High
Chip Enable Low to Clock High
Chip Enable Low to Wait Valid
Chip Enable pulse width
(subsequent synchronous reads)
Chip Enable High to Wait Hi-Z
Clock High to Address Transition
Clock High to Output Valid
Clock High to WAIT Valid
Clock High to Output Transition
Clock High to WAIT Transition
Latch Enable Low to Clock High
Clock Period (f = 54 MHz)
Clock High to Clock Low
Clock Low to Clock High
Clock Fall or Rise Time
KHQV
50.
+ FPGA data-to-CCLK setup time. See the FPGA data sheet for FPGA setup time.
Platform Flash XL High-Density Configuration and Storage Device
Parameter
(1,2)
www.xilinx.com
(4)
Max
Max
Max
Max
Min
Min
Min
Min
Min
Min
Min
Min
2.3V to 2.7V
V
DDQ
17
20
17
16
19
10
2
9
9
2
9
6
Voltage Range
=
3.0V to 3.6V
V
DDQ
17
20
17
10
16
19
9
9
2
9
6
2
=
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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