NCP1207DR2G ON Semiconductor, NCP1207DR2G Datasheet - Page 10

• Manufacturer Part Number: NCP1207DR2G
• Description: IC CTRLR PWM CM OVP OCP HV 8SOIC
• Manufacturer: ON Semiconductor

Specifications of NCP1207DR2G

• Output Isolation: Isolated
• Voltage - Input: 10.6 ~ 16 V
• Operating Temperature: -40°C ~ 150°C
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: NCP1207DR2GOS

inserted between the current sense input and the sense element.
Every time the NCP1207 output driver goes low, a 200 mA
source forces a current to flow through the sense pin
(Figure 19): when the driver is high, the current source is off
and the current sense information is normally processed. As
soon as the driver goes low, the current source delivers 200 mA
and develops a ground referenced voltage across R
voltage is below the feedback voltage, the current sense
comparator stays in the high state and the internal latch can be
triggered by the next clock cycle. Now, if because of a low load
mode the feedback voltage is below R
RESET
The skip level selection is done through a simple resistor
Figure 19. A patented method allows for skip level
selection via a series resistor inserted in series
Figure 20. When the primary natural ringing becomes too low, the internal timeout together with the sense
Timeout
Timeout
−
+
Signal
Signal
Signal
Signal
Drain
Drain
with the current
+
3
2
DRIVER
comparator initiates a new cycle when FB passes the skip level.
DRIVER = HIGH ? I = 0
DRIVER = LOW ? I = 200 mA
R
skip
skip
level, then the
skip
R
sense
. If this
http://onsemi.com
5 ms
NCP1207
Current Sense and Timeout Restart
Demag Restart
10
current sense comparator permanently resets the latch and the
next clock cycle (given by the demagnetization detection) is
ignored: we are skipping cycles as shown by Figure 20. As
soon as the feedback voltage goes up again, there can be two
situations: the recurrent period is small and a new
demagnetization detection (next wave) signal triggers the
NCP1207. To the opposite, in low output power conditions, no
more ringing waves are present on the drain and the toggling
of the current sense comparator together with the internal 5 ms
timeout initiates a new cycle start. In normal operating
conditions, e.g. when the drain oscillations are generous, the
demagnetization comparator can detect the 50 mV crossing
and gives the “green light”, alone, to re−active the power
switch. However, when skip cycle takes place (e.g. at low
output power demands), the restart event slides along the drain
ringing waveforms (actually the valley locations) which
decays
L
thus quickly occur where the ringing becomes too weak to be
detected by the demagnetization comparator: it then
permanently stays locked in a given position and can no longer
deliver the “green light” to the controller. To help in this
situation, the NCP1207 implements a 5 ms timeout generator:
each time the 50 mV crossing occurs, the timeout is reset. So,
as long as the ringing becomes too low, the timeout generator
starts to count and after 5 ms, it delivers its “green light”. If the
skip signal is already present then the controller restarts;
otherwise the logic waits for it to set the drive output high.
Figure 20 depicts these two different situations:
primary
−C
more
parasitic
or
5 ms
network damping factor. The situation can
less
quickly,
depending
on
the