NCP1207ADR2G ON Semiconductor, NCP1207ADR2G Datasheet - Page 10

• Manufacturer Part Number: NCP1207ADR2G
• Description: IC CTRLR PWM CM OVP OCP HV 8SOIC
• Manufacturer: ON Semiconductor

Specifications of NCP1207ADR2G

• Output Isolation: Isolated
• Voltage - Input: 10.6 ~ 20 V
• Operating Temperature: -40°C ~ 150°C
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Number Of Outputs: 1
• Output Current: 500 mA
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 18 V
• Maximum Operating Temperature: + 150 C
• Fall Time: 20 ns
• Minimum Operating Temperature: - 40 C
• Rise Time: 40 ns
• Synchronous Pin: No
• Topology: Flyback
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: NCP1207ADR2G; NCP1207ADR2GOSTR

COMPARATOR
information to the FB pin while providing the necessary
isolation. It introduces a limitation in how low the skip level
can be adjusted since an optocoupler cannot pull the FB
voltage below its Vce(sat), which is usually around 150 mV.
Therefore, in order to take into account temperature and
process variations, it is not recommended to set up the skip
level below 250 mV, which corresponds to a minimum
resistor Rskip of 420 Ω. The 150 mV is a much lower level
than what will usually be used (it sets the peak current when
entering skip mode at 5% of the maximum peak current).
If anyway a lower skip threshold is needed, care must be
taken to select an optocoupler with a Vce(sat) guaranteed to
be below the chosen skip level with enough margin.
Demagnetization Detection
activity on the auxiliary winding. This voltage features a
FLYBACK polarity. The typical detection level is fixed at
50 mV as exemplified by Figure 17.
(NCP1207A) or 4.5 ms (NCP1207B) further to the driver
going- -low transition. This prevents the switching frequency
to exceed (1 / (T
avoid false leakage inductance tripping at turn- -off. In some
cases, the leakage inductance kick is so energetic, that a slight
filtering is necessary.
a specific component arrangement as detailed by Figure 18.
In this picture, the zener diodes network protect the IC against
TO INTERNAL
R
--1.0
An optocoupler is generally used to transfer the feedback
The core reset detection is done by monitoring the voltage
An internal timer prevents any re- -start within 8.0 ms
The NCP1207A/B demagnetization detection pad features
esd
Figure 17. Core reset detection is done through a
7.0
5.0
3.0
1.0
+ R
dedicated auxiliary winding monitoring
int
R
Figure 18. Internal Pad Implementation
RE--STARTS
int
POSSIBLE
= 28 k
ON
+ 8.0 ms)) or (1 / (T
2
ESD2
0 V
R
esd
1
ESD1
ON
1
4
+ 4.5 ms)) but also
5
R
50 mV
dem
http://onsemi.com
4
3
Aux
10
any potential ESD discharge that could appear on the pins.
The first ESD diode connected to the pad, exhibits a parasitic
capacitance. When this parasitic capacitance (10 pF
typically) is combined with R
and the possibility to switch right in the drain- -source wave
exists. This guarantees QR operation with all the associated
benefits (low EMI, no turn- -on losses etc.). R
calculated to limit the maximum current flowing through
pin 1 to less than +3 mA/- -2 mA. If during turn- -on, the
auxiliary winding delivers 30 V (at the highest line level),
then the minimum R
/ 2 mA = 14.6 kΩ. This value will be further increased to
introduce a re- -start delay and also a slight filtering in case of
high leakage energy.
power.
Overvoltage Protection
voltage 4.5 ms (NCP1207A) or 1.5 ms (NCP1207B)after the
turn- -off sequence. This delay guarantees a clean plateau,
providing that the leakage inductance ringing has been fully
damped. If this would not be the case, the designer should
install a small RC damper across the transformer primary
inductance connections. Figure 20 shows where the
sampling occurs on the auxiliary winding.
Figure 19 portrays a typical V
The overvoltage protection works by sampling the plateau
400
300
200
100
0
Figure 19. The NCP1207A Operates in
Borderline / Critical Operation
dem
value is defined by: (30 V + 0.7 V)
dem
, a re- -start delay is created
DS
shot at nominal output
dem
should be