NCP1207ADR2G ON Semiconductor, NCP1207ADR2G Datasheet - Page 11

• Manufacturer Part Number: NCP1207ADR2G
• Description: IC CTRLR PWM CM OVP OCP HV 8SOIC
• Manufacturer: ON Semiconductor

Specifications of NCP1207ADR2G

• Output Isolation: Isolated
• Voltage - Input: 10.6 ~ 20 V
• Operating Temperature: -40°C ~ 150°C
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Number Of Outputs: 1
• Output Current: 500 mA
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 18 V
• Maximum Operating Temperature: + 150 C
• Fall Time: 20 ns
• Minimum Operating Temperature: - 40 C
• Rise Time: 40 ns
• Synchronous Pin: No
• Topology: Flyback
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: NCP1207ADR2G; NCP1207ADR2GOSTR

NCP1207A/B enters a latchoff phase and stops all switching
operations. The controller stays fully latched in this position
and the DSS is still active, keeping the V
V/12 V as in normal operations. This state lasts until the V
is cycled down 4 V, e.g. when the user unplugs the power
supply from the mains outlet.
reference level and pin1 is routed via a divide by 1.44
network. As a result, when Vpin 1 reaches 7.2 V, the OVP
comparator is triggered. The threshold can thus be adjusted
by either modifying the power winding to auxiliary winding
turn ratios to match this 7.2 V level, or insert a resistor from
Pin 1 to ground to cope with your design requirement.
Latching Off the NCP1207A/B
shut down permanently the NCP1207A/B via a dedicated
signal, e.g. coming from a temperature sensor. The reset
occurs when the user unplugs the power supply from the
mains outlet. To trigger the latchoff, a CTN (Figure 21) or
a simple NPN transistor (Figure 22) can do the work.
When an OVP condition has been detected, the
By default, the OVP comparator is biased to a 5.0 V
In certain cases, it can be very convenient to externally
soon as the temperature exceeds a given setpoint
8.0
6.0
4.0
2.0
Figure 20. A voltage sample is taken 4.5 ms after
Figure 21. A simple CTN triggers the latchoff as
0
4.5 ms
the turn- -off sequence
1
2
3
4
NCP1207A/B
CTN
8
7
6
5
SAMPLING HERE
Aux
CC
between 5.3
http://onsemi.com
CC
11
Shutting Off the NCP1207A/B
NPN bipolar transistor as depicted by Figure 23. When OFF,
Q1 is transparent to the operation. When forward biased, the
transistor pulls the FB pin to ground (V
permanently disables the IC. A small time constant on the
transistor base will avoid false triggering (Figure 23).
Power Dissipation
through the internal DSS circuitry. The DSS being an
auto- -adaptive circuit (e.g. the ON/OFF duty- -cycle adjusts
itself depending on the current demand), the current flowing
through the DSS is therefore the direct image of the
NCP1207A/B current consumption. The total power
dissipation
Vac rail, the maximum rectified voltage can go up to 350
Vdc. As a result, the worse case dissipation occurs at the
maximum switching frequency and the highest line. The
dissipation is actually given by the internal consumption of
the NCP1207A/B when driving the selected MOSFET. The
best method to evaluate this total consumption is probably
to run the final circuit from a 50 Vdc source applied to pin 8
and measure the average current flowing into this pin.
Suppose that we find 2.0 mA, meaning that the DSS
duty- -cycle
From the 350 Vdc rail, the part will dissipate:
(V HVDC − 11 V) ⋅ I CC2
350 V ⋅ 2.0 mA = 700 mW
ON/OFF
ON/OFF
Shutdown can easily be implemented through a simple
The NCP1207A/B is directly supplied from the DC rail
Figure 22. A simple transistor arrangement allows
Figure 23. A simple bipolar transistor totally
to trigger the latchoff by an external signal
3
10 k
will
can
disables the IC
10 nF
2
. If we operate the device on a 250
be
be
(however this 2.0 mA number
Q1
1
2
3
4
2.0/7.0
NCP1207A/B
evaluated
1
CE(sat)
1
2
3
4
NCP1207A/B
 200 mV) and
=
8
7
6
5
Aux
28.6%.
using:
8
7
6
5