LTC4012IUF-1#TRPBF Linear Technology, LTC4012IUF-1#TRPBF Datasheet - Page 22

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LTC4012IUF-1#TRPBF

Manufacturer Part Number
LTC4012IUF-1#TRPBF
Description
IC CTLR BATT CHARGER CC/CV 20QFN
Manufacturer
Linear Technology
Datasheet

Specifications of LTC4012IUF-1#TRPBF

Function
Charge Management
Battery Type
Multi-Chemistry
Voltage - Supply
6 V ~ 28 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
20-WFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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applications inForMation
LTC4012/
LTC4012-1/LTC4012-2
R
ues of R
programmed current accuracy. Use these equations and
guidelines, as represented in Table 6, to help select the cor-
rect inductor value. This table was developed for C-grade
parts to maintain maximum ∆I
550kHz and V
assuming that inductor value could also vary by 25% at
I
0.4 • I
batteries over the wider I-grade temperature range. In that
case, a good starting point can be found by multiplying
the inductor values shown in Table 6 by a factor of 1.6 and
rounding up to the nearest standard value.
Table 6. Minimum Typical Inductor Values
To guarantee that a chosen inductor is optimized in any
given application, use the design equations provided and
perform bench evaluation in the target application, par-
ticularly at duty cycles below 20% or above 80% where
PWM frequency can be much less than the nominal value
of 550kHz.

MAX
10V to 20V
10V to 20V
10V to 20V
10V to 20V
IN
<10V
>20V
<10V
>20V
<10V
>20V
<10V
>20V
V
should not be less than 2.37k or more than 6.04k. Val-
. For I-grade parts, reduce maximum ∆I
CLP
MAX
IN
, but only if the IC will actually be used to charge
greater than 3.01k may cause some reduction in
≥5.1µH
≥3.4µH
≥6.8µH
≥9.5µH
≥2.5µH
≥5.1µH
≥7.1µH
BAT
≥10µH
≥20µH
≥28µH
≥10µH
≥14µH
(Typ)
L1
= 0.5 • V
I
MAX
1A
1A
1A
2A
2A
2A
3A
3A
3A
4A
4A
4A
CLP
(the point of maximum ∆I
L
100mΩ
100mΩ
100mΩ
R
near 0.6 • I
50mΩ
50mΩ
50mΩ
33mΩ
33mΩ
33mΩ
25mΩ
25mΩ
25mΩ
SENSE
3.01k
3.01k
3.01k
3.01k
3.01k
3.01k
3.01k
3.01k
3.01k
3.01k
3.01k
3.01k
MAX
R
IN
L
with f
to less than
R
26.7k
26.7k
26.7k
26.7k
26.7k
26.7k
26.7k
26.7k
26.7k
26.7k
26.7k
26.7k
PWM
PROG
L
at
),
TGATE BOOST Supply
Use the external components shown in Figure 11 to de-
velop a bootstrapped BOOST supply for the TGATE FET
driver. A good set of equations governing selection of the
two capacitors is:
where Q
with V
then given by:
To improve efficiency by increasing V
top FET, substitute a Schottky diode with low reverse
leakage for D1.
PWM jitter has been observed in some designs operating
at higher V
affect DC charge current accuracy. A series resistor with a
value of 5Ω to 20Ω can be inserted between the cathode
of D1 and the BOOST pin to remove this jitter, if present.
A resistor case size of 0603 or larger is recommended to
lower ESL and achieve the best results.
I
C
D
1
= Q
=
GS
G
20
G
= 4.5V. The maximum average diode current is
4 5
is the rated gate charge of the top external NFET
IN
• 665kHz
.
LTC4012
/V
Q
V
INTV
BOOST
G
OUT
Figure 11. TGATE Boost Supply
,
SW
DD
C
ratios. This jitter does not substantially
2 20
20
17
18
=
4012 F11
C
D1
1N4148
C2
2µF
1
C1
0.1µF
L1
GS
applied to the
TO
R
SENSE
4012fa

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