IR1167ASPBF International Rectifier, IR1167ASPBF Datasheet - Page 6

• Manufacturer Part Number: IR1167ASPBF
• Description: IC MOSFET DRIVER N-CHAN 8-SOIC
• Manufacturer: International Rectifier
• Series: SmartRectifier™r

Specifications of IR1167ASPBF

• Configuration: Low-Side
• Input Type: Self Oscillating
• Delay Time: 60ns
• Current - Peak: 2A
• Number Of Configurations: 1
• Number Of Outputs: 1
• Voltage - Supply: 12 V ~ 18 V
• Operating Temperature: -25°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Part Status: Active and Preferred
• Package: 8-Pin SOIC(NB)
• Circuit: Switching Regulator Controller
• Topology: Flyback / Resonant Half-Bridge
• Current Mode: Discontinuous / Critical / Continuous
• Vcc (min): 11.4
• Vcc (max): 18
• Vout (max): 200
• Iout (a): +2 / -7
• Switch Freq (khz): up to 500kHz
• Vgate Clamp (v): 10.7
• Programmability: MOT / OVT
• Enable Pin: Yes
• Isleep (ua): 200
• Automatic Mot Protection: No
• Pbf: PbF Option Available
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• High Side Voltage - Max (bootstrap): -

GND: Ground
This is ground potential pin of the integrated control
circuit. The internal devices and gate driver are
referenced to this point.
MOT: Minimum On Time
The MOT programming pin controls the amount of
minimum on time. Once V
time, the gate signal will become active and turn on
the power FET. Spurious ringings and oscillations can
trigger the input comparator off. The MOT blanks the
input comparator keeping the FET on for a minimum
time.
The MOT is programmed between 200ns and 3us
(typ.) by using a resistor referenced to GND.
OVT: Offset Voltage Trimming
The OVT pin will program the amount of input offset
voltage for the turn-off threshold V
The pin can be optionally tied to ground, to VCC or
left floating, to select 3 ranges of input offset trimming.
This programming feature allows for accomodating
different RDSon MOSFETs.
GATE: Gate Drive Output
This is the gate drive output of the IC. Drive voltage
is internally limited and provides 2A peak source and
7A peak sink capability. Although this pin can be
directly connected to the power MOSFET gate, the
use of minimal gate resistor is recommended,
expecially when putting multiple FETs in parallel.
Care must be taken in order to keep the gate loop as
short and as small as possible in order to achieve
optimal switching performance.
VS: Source Voltage Sense
VS is the differential sense pin for the power MOSFET
Source. This pin must not be connected directly to
the power ground pin (7) but must be used to create a
Detailed Pin Description
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TH2
is crossed for the first
TH1
.
kelvin contact as close as possible to the power
MOSFET source pin.
VD: Drain Voltage Sense
VD is the voltage sense pin for the power MOSFET
Drain. This is a high voltage pin and particular care
must be taken in properly routing the connection to
the power MOSFET drain.
Additional filtering and or current limiting on this pin is
not recommended as it would limit switching perfor-
mance of the IC.
VCC: Power Supply
This is the supply voltage pin of the IC and it is
monitored by the under voltage lockout circuit. It is
possible to turn off the IC by pulling this pin below the
minimum turn off threshold voltage, without damage
to the IC.
To prevent noise problems, a bypass ceramic
capacitor connected to Vcc and GND should be
placed as close as possible to the IR1167S.
This pin is internally clamped.
EN: Enable
This pin is used to activate the IC “sleep” mode by
pulling the voltage level below 2.5V (typ). In sleep
mode the IC will consume a minimum amount of cur-
rent. However all switching functions will be disabled
and the gate will be inactive.
IR1167AS/BS
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