A3948SLB Allegro Microsystems Inc, A3948SLB Datasheet
A3948SLB
Specifications of A3948SLB
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A3948SLB Summary of contents
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Discontinued Product These parts are no longer in production The device should not be purchased for new design applications. Samples are no longer available. Date of status change: April 28, 2007 Recommended Substitutions: NOTE: For detailed information on purchasing options, ...
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... Per SEMI G42-88 Specification. 3948 DMOS FULL-BRIDGE PWM Designed for pulse-width modulated (PWM) current control of dc motors, the A3948SB and A3948SLB are capable of continuous output currents to 1.5 A and operating voltages Internal fixed off- REG time PWM current-control timing circuitry can be programmed via a serial interface to operate in slow, fast, and mixed current-decay modes ...
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... DETECT CURRENT SENSE SLEEP REFERENCE MODE BUFFER & RANGE REG RANGE 22 21 OUT B LOAD SUPPLY Note that the A3948SLB (SOIC) and A3948SB 19 GROUND (DIP) do not share a common terminal assignment. 18 GROUND 17 SENSE OUT 16 A MODE 15 REF 14 STROBE 13 Dwg. PP-069- REG BANDGAP REGULATOR ...
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DMOS FULL-BRIDGE PWM MOTOR DRIVER V - 0.1 DD Continued next page … ...
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DMOS FULL-BRIDGE PWM MOTOR DRIVER NOTES: 1. Typical Data is for design information only. 2. Negative current is defined as coming out of (sourcing) the specified device terminal. ...
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The A3948 is controlled via a 3-wire (clock, data, strobe) serial port. The programmable functions allow maximum flexibility in configuring the PWM to the motor drive requirements. The serial data is clocked in starting with D19. The current-sense comparator is ...
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DMOS FULL-BRIDGE PWM MOTOR DRIVER Bit D15, in conjunction with PHASE, determines if the device is operating in the forward (PHASE D15) or reverse (PHASE = D15) state. Bit D16, in conjunction with RANGE, determines divided ...
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This internally generated voltage is used to operate the sink-side DMOS outputs. The V be decoupled with a 0.22 F capacitor to ground. V internally monitored and in the case of a fault condition, the outputs of the device are ...
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DMOS FULL-BRIDGE PWM MOTOR DRIVER To minimize inaccuracies in sensing the I current level, which may be caused by ground TRIP trace IR drops, the sense resistor should have an independent ground return to the ground terminal of the ...
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For the A3948SB DIP only, there is an indeterminate resistance between the substrate grounds (pins 6, 7, 18, and 19) and the grounds at pins 5 and 8. Pins 5 and 8, and must ...
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DMOS FULL-BRIDGE PWM MOTOR DRIVER 24 0.280 0.240 1 0.070 0.045 0.210 MAX 0.015 MIN 0.022 0.014 24 7.11 6.10 1 1.77 1.15 5.33 MAX 0.39 MIN 0.558 0.356 NOTES: 1. Webbed lead frame. Leads 6, 7, 18, and ...
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NOTES: 1. Exact body and lead configuration at vendor’s option within limits shown. 2. Lead spacing tolerance is non-cumulative. 3. Webbed lead frame. Leads 6, 7, 18, and 19 are ...
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DMOS FULL-BRIDGE PWM MOTOR DRIVER The products described here are manufactured under one or more U.S. patents or U.S. patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications ...