A3948SLB Allegro Microsystems Inc, A3948SLB Datasheet - Page 8

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A3948SLB

Manufacturer Part Number
A3948SLB
Description
IC MOTOR DRIVER PWM FULL 24-SOIC
Manufacturer
Allegro Microsystems Inc
Datasheet

Specifications of A3948SLB

Applications
PWM Motor Driver
Number Of Outputs
1
Current - Output
±1.5A
Voltage - Load
20 V ~ 50 V
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-20°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-SOIC (7.5mm Width)
Operating Current
10mA
Operating Temperature Classification
Commercial
Package Type
SOIC W
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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the sink-side DMOS outputs. The V
be decoupled with a 0.22 F capacitor to ground. V
internally monitored and in the case of a fault condition,
the outputs of the device are disabled.
gate-supply voltage greater than V
side DMOS gates. A 0.22 F ceramic capacitor should be
connected between CP1 and CP2 for pumping purposes.
A 0.22 F ceramic capacitor should be connected between
CP and V
DMOS devices. The CP voltage is internally monitored
and, in the case of a fault condition, the source outputs of
the device are disabled.
temperature, or low voltage on CP or V
the device are disabled until the fault condition is
removed. At power up, or in the event of low V
UVLO circuit disables the drivers and resets the data in
the serial port to all zeros. A watchdog circuit will also
reset the data in the absence of an OSC signal.
programmable via the serial port (bits D2 – D10) to
provide off-time PWM signals to the control circuitry. In
the mixed current-decay mode, the first portion of the off
time operates in fast decay, until the fast decay time count
(serial bits D7 – D10) is reached, followed by slow decay
for the rest of the off-time period (bits D2 – D6). If the
fast decay time is set longer than the off time, the device
effectively operates in fast decay mode. Bit D17, in
conjunction with MODE, selects mixed or slow decay.
current spike occurs due to the reverse recovery currents
of the clamp diodes and/or switching transients related to
distributed capacitance in the load. To prevent this current
spike from erroneously resetting the source-enable latch,
the sense comparator is blanked. The blank timer runs
after the off-time counter (see bits D2 – D6) to provide the
programmable blanking function. The blank timer is reset
when ENABLE is chopped or PHASE is changed. For
external PWM control, a PHASE change or ENABLE on
will trigger the blanking function.
www.allegromicro.com
This internally generated voltage is used to operate
BB
to act as a reservoir to operate the high-side
In the event of a fault (excessive junction
The charge pump is used to generate a
When a source driver turns on, a
The PWM timer is
BB
REG
to drive the source-
REG
terminal should
) the outputs of
DD
, the
REG
is
is triggered, either by an ENABLE chop command or
internal fixed off-time cycle, load current will recirculate
according to the decay mode selected by the control logic.
The A3948 synchronous rectification feature will turn on
the opposite pair of DMOS outputs during the current
decay and effectively short out the body diodes with the
low r
significantly and can eliminate the need for external
Schottky diodes.
Synchronous rectification can be configured in active
mode, passive mode, or disabled via the serial port (bits
D11 and D12).
The active or passive mode selection has no impact in
slow-decay mode. With synchronous rectification
enabled, the slow-decay mode serves as an effective brake
mode.
internal fixed off-time PWM control circuit. When the
outputs of the DMOS H bridge are turned on, the current
increases in the motor winding until it reaches a trip value
determined by the external sense resistor (R
analog reference voltage (V
and serial data bit D16:
At the trip point, the sense comparator resets the source-
enable latch, turning off the source driver. The load
inductance then causes the current to recirculate for the
serial-port-programmed fixed off-time period. The
current path during recirculation is determined by the
configuration of slow/mixed current-decay mode (D17)
and the synchronous rectification control bits (D11 and
D12).
Note that the sense voltage (V
0.55 V (absolute maximum rating). Therefore, if the
reference divider is set to 5, V
2.75 V; if the reference divider is set to 10, V
be greater than 5.5 V (absolute maximum rating).
When RANGE = D16 ........... I
When RANGE
DS(on)
driver. This will reduce power dissipation
PWM MOTOR DRIVER
D16 ............ I
DMOS FULL-BRIDGE
Load current is regulated by an
REF
S
REF
), the RANGE logic level,
) must not be greater than
When a PWM off cycle
TRIP
must not be greater than
TRIP
= V
= V
REF
REF
S
), the applied
/10R
REF
/5R
3948
must not
S
S

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