LTC1470CS8#TR Linear Technology, LTC1470CS8#TR Datasheet - Page 4

IC MATRIX SW SINGLE 5/3.3V 8SOIC

LTC1470CS8#TR

Manufacturer Part Number
LTC1470CS8#TR
Description
IC MATRIX SW SINGLE 5/3.3V 8SOIC
Manufacturer
Linear Technology
Type
PCMCIA/Cardbus Switchr
Datasheet

Specifications of LTC1470CS8#TR

Number Of Outputs
1
Rds (on)
180 mOhm
Internal Switch(s)
Yes
Current Limit
1A
Voltage - Input
3.3V, 5V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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LTC1470
OUT (Pins 1, 8): Output Pins. The outputs of the LTC1470
are switched between three operating states: OFF, 3.3V
and 5V. These pins are protected against accidental short
circuits to ground by SafeSlot current limit circuitry which
protects the socket, the card, and the system power
supplies against damage. A second level of protection is
provided by thermal shutdown circuitry which protects
both switches against over-temperature conditions.
5V
serves two purposes. The first purpose is as the power
supply input for the 5V NMOS switch. The second purpose
is to provide power for the input, gate drive, and protection
circuitry for both the 3.3V and 5V V
must therefore be continuously powered.
EN1, EN0 (Pins 3, 4): Enable Inputs. The two V
inputs are designed to interface directly with industry
standard PCMCIA controllers and are high impedance
CMOS gates with ESD protection diodes to ground, and
LTC1470/LTC1471
PIN
TYPICAL PERFORMANCE CHARACTERISTICS
4
0.30
0.25
0.20
0.15
0.10
0.05
IN
U
0
(Pin 2): 5V Input Supply Pin. The 5V
0
5V Switch Resistance
FUNCTIONS
PROGRAMMED
TO 5V
25
JUNCTION TEMPERATURE (°C)
U
50
U
75
W
100
1470/71 G06
U
125
CC
switches. This pin
IN
3
2
1
0
6
4
2
0
– 0.2
Inrush Current (3.3V Switch)
supply pin
CC
T
J
= 25°C
0
Enable
0.2
0.4
TIME (ms)
0.6
should not be forced above 5V
inputs have about 100mV of built-in hysteresis to ensure
clean switching between operating modes. The LTC1470
is designed to operate without 12V power. The gates of the
V
the 5V
for more detail). The Enable inputs should be turned off
(both asserted high or both asserted low) at least 100µs
before the 5V
NMOS switch gates are fully discharged and both switches
are in the high impedance mode.
GND (Pin 5): Ground Connection.
3V
pins serve as the power supply input for the 3.3V switches.
These pins do not provide any power to the internal control
circuitry and therefore do not consume any power when
unloaded or turned off.
CC
C
R
C
R
OUT
OUT
IN
0.8
OUT
R
OUT
C
OUT
OUT
NMOS switches are powered by charge pumps from
= 150µF
(Pins 6, 7): 3V Input Supply Pins. The 3V
= 6.6Ω
= 150µF
= 6.6Ω
IN
1.0
= 15µF
= 6.6Ω
supply pins (see Applications Information section
1470/71 G09
1.2
(LTC1470 or 1/2 LTC1471)
IN
1.4
power is removed to ensure that both V
3
2
1
0
6
4
2
0
– 0.2
Inrush Current (5V Switch)
C
CURRENT
OUT
LIMITED
R
0
OUT
= 150µF
IN
= 10Ω
0.2
or below ground. Both
0.4
TIME (ms)
0.6
0.8
C
R
OUT
OUT
IN
1.0
T
J
= 15µF
= 10Ω
= 25°C
supply
1470/71 G08
1.2
14701fa
1.4
CC

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