LTC1470CS8#TR Linear Technology, LTC1470CS8#TR Datasheet - Page 6

• Manufacturer Part Number: LTC1470CS8#TR
• Description: IC MATRIX SW SINGLE 5/3.3V 8SOIC
• Manufacturer: Linear Technology
• Type: PCMCIA/Cardbus Switchr

Specifications of LTC1470CS8#TR

• Number Of Outputs: 1
• Rds (on): 180 mOhm
• Internal Switch(s): Yes
• Current Limit: 1A
• Voltage - Input: 3.3V, 5V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

OPERATION
APPLICATIONS
The LTC1470/LTC1471 are designed to interface directly
with industry standard PCMCIA card controllers.
Interfacing with the CL-PD6710
Figure 1 is a schematic diagram showing the LTC1470
interfaced with a standard PCMCIA slot controller. The
LTC1470 accepts logic control directly from the CL-PD6710.
The XOR input function allows the LTC1470 to interface
directly to the active-low V
PD6710 for 3.3V/5V voltage selection (see the following
Switch Truth Table). Therefore, no “glue” logic is required
to interface to this PCMCIA compatible card controller.
LTC1470/LTC1471
The LTC1470 (or 1/2 of the LTC1471) consists of the
following functional blocks:
Input TTL/CMOS Converters
The enable inputs are designed to accommodate a wide
range of 3V and 5V logic families. The input threshold
voltage is approximately 1.4V with approximately 100mV
of hysteresis. The inputs enable the bias generator, the
gate charge pumps and the protection circuity which are
powered from the 5V supply. Therefore, when the inputs
are turned off, the entire circuit is powered down and the
5V supply current drops below 1µA.
XOR Input Circuitry
By employing an XOR function, which locks out the 3.3V
switch when the 5V switch is turned on and locks out the
5V switch when the 3.3V switch is turned on, there is no
danger of both switches being on at the same time. This
XOR function also makes it possible to work with either
active -low or active-high PCMCIA V
(see Applications Information section for further details).
Break-Before-Make Switch Control
Built-in delays are provided to ensure that the 3.3V and 5V
switches are non-overlapping. Further, the gate charge
pump includes circuitry which ramps the NMOS switches
6
U
U
INFORMATION
U
CC
control outputs of the CL-
CC
W
switch control logic
U
on slowly (400µs typical rise time) but turns them off
much more quickly (typically 10µs).
Bias, Oscillator and Gate Charge Pump
When either the 3.3V or 5V switch is enabled, a bias
current generator and high frequency oscillator are turned
on. The on-chip capacitive charge pump generates ap-
proximately 12V of gate drive for the internal low R
NMOS V
fore, an external 12V supply is not required to switch the
V
when both switches are turned off.
Gate Charge and Discharge Control
All switches are designed to ramp on slowly (400µs typical
rise time). Turn-off time is much quicker (typically 10µs).
To ensure that both V
discharged, program the switch to the high impedance
mode at least 100µs before turning off the 5V power
supply.
Switch Protection
Both switches are protected against accidental short cir-
cuits with SafeSlot foldback current limit circuits which
limit the output current to typically 1A when the output is
shorted to ground. Both switches also have thermal shut-
down which limits the power dissipation to safe levels.
CL-PD6710
CC
Figure 1. Direct Interface to CL-PD6710 PCMCIA Controller
output. The 5V
V
V
CC
CC
3.3V
_3
_5
5V
CC
switches from the 5V
0.1µF
0.1µF
IN
5V
EN0
EN1
3V
supply current drops below 1µA
IN
CC
LTC1470
IN
GND
NMOS switch gates are fully
3V
OUT
OUT
IN
IN
+
power supply. There-
1µF
TANT
(OFF/3.3V/5V)
10k
DS(ON)
TO CARD
V
CC
1470/71 F01
14701fa
PINS