IR3084UMPBF International Rectifier, IR3084UMPBF Datasheet

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TM XPHASE DESCRIPTION The IR3084U Control IC combined with an IR XPhase way to implement a complete VR10, VR11, Opteron, or Athlon64 power solution. The “Control” IC provides overall system control and interfaces with any number of “Phase” ICs which ...

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TYPICAL APPLICATION CIRCUIT RT2 R117 4.7K, B=4450 1.21K RFB1 CFB 162 12nF VCC_SENSE RFB C1009 348 RDRP1 1nF 750 VSS_SENSE Q5 OUTEN VID0 VID1 VID2 VID3 VID4 VID5 VID6 VID_SEL VREG_12V_FILTERED R30 C130 10 0.1uF Page CCP1 ...

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... ORDERING INFORAMATION DEVICE IR3084UMTRPBF IR3084UMPBF ABSOLUTE MAXIMUM RATINGS Operating Junction Temperature……………..0 to 150 Storage Temperature Range………………….−65 ESD Rating………………………………………HBM Class 1B JEDEC standard Moisture Sensitivity Level… ...

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ELECTRICAL SPECIFICATIONS Unless otherwise specified, these specifications apply over: 9.5V ≤ ≤ T ≤ 100 C, ROSC = 24k , CSS/DEL = 0.1µF ±10% J PARAMETER VDAC REFERENCE VR10/VR11 System Set-Point VID ≥ 1V, 10k ...

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PARAMETER CURRENT SENSE INPUT IIN BIAS CURRENT V(SS/DEL) > 0.85V, V(EAOUT) > 0.5V IIN Preconditioning Pull-Down V(SS/DEL) < 0.35V Resistance IIN Preconditioning RESET V(EAOUT) Threshold IIN Preconditioning SET V(SS/DEL) Threshold VDRP BUFFER AMPLIFIER Input Offset Voltage V(VDRP) – V(IIN), 0.5V ...

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PARAMETER VRRDY OUTPUT Output Voltage I(VRRDY) = 4mA Leakage Current V(VRRDY) = 5.5V ENABLE INPUT VR10/11 Threshold Voltage ENABLE rising VR10/11 Threshold Voltage ENABLE falling VR10/11 Threshold Hysteresis Opteron/Athlon64 Threshold ENABLE rising Voltage Opteron/Athlon64 Threshold ENABLE falling Voltage Opteron/Athlon64 Threshold ...

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PARAMETER VCC UNDER-VOLTAGE LOCKOUT Start Threshold Stop Threshold Hysteresis Start – Stop GENERAL VCC Supply Current −0.3V < VOSNS− < 0.3V, VOSNS− Current All VID Codes Note 1: Guaranteed by design, but not tested in production Note 2: VDAC Output ...

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PIN DESCRIPTIONS PIN# PIN SYMBOL Selects the DAC table and the type of Soft Start. There are 3 possible modes of operation: (1) GND selects VR10 DAC and VR11 type startup, (2) FLOAT (2.4V) 1 VIDSEL selects VR11 DAC and ...

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SYSTEM THEORY OF OPERATION TM XPhase Architecture TM The XPhase architecture is designed for multiphase interleaved buck converters which are used in applications requiring small size, design flexibility, low voltage, high current and fast transient response. The architecture can be ...

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PWM Control Method The PWM block diagram of the XPhase with trailing edge modulation is used. A high-gain wide-bandwidth voltage type error amplifier in the Control IC is used for the voltage control loop. An external RC circuit connected to ...

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VPEAK (5.0V) VPHASE4&5 (4.5V) VPHASE3&6 (3.5V) VPHASE2&7 (2.5V) VPHASE1&8 (1.5V) VVALLEY (1.00V) CLK1 CLK2 CLK3 CLK4 CLK5 CLK6 CLK7 CLK8 PWM Operation The PWM comparator is located in the Phase IC. Upon receiving a clock pulse, the PWM latch is ...

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TM Body Braking In a conventional synchronous buck converter, the minimum time required to reduce the current in the inductor in response to a load step decrease is; The slew rate of the inductor current can be significantly increased by ...

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The advantage of sensing the inductor current versus high side or low side sensing is that actual output current being delivered to the load is obtained rather than peak or sampled information about the switch currents. The output voltage can ...

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IR3084U THEORY OF OPERATION Block Diagram VCC UVLO COMPARATOR VCC - + + VOSNS FLOAT 2.0V 9.9V DETECT 9. ENABLE 250ns COMPARATOR ENABLE BLANKING - + + INTEL AMD + 850mV 1.23V 100k 80mV VCHG 750mV 1.17V ...

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VID4 VID3 VID2 VID1 VID0 VID5 ...

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Hex (VID7:VID0) Dec (VID7:VID0) 00 00000000 01 00000001 02 00000010 03 00000011 04 00000100 05 00000101 06 00000110 07 00000111 08 00001000 09 00001001 0A 00001010 0B 00001011 0C 00001100 0D 00001101 0E 00001110 0F 00001111 10 00010000 11 00010001 ...

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VID4 VID3 Table 3 – Opteron 5-bit VID ...

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Dynamic VID Operation The IR3084U can accept changes in the VID code while operating and vary the DAC voltage accordingly. The sink/source capability of the VDAC buffer amp is programmed by the external resistor that sets the oscillator frequency (Rosc). ...

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Inductor DCR Temperature Correction If the thermal compensation of the inductor DCR provided by the temperature dependent gain of the current sense amplifier is not adequate, a negative temperature coefficient (NTC) thermistor can be used for additional correction. The thermistor ...

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Figure 10a depicts the start-up sequence without AVP in Boot mode − the VIDSEL pin is either grounded or floated. First, the VDAC pin is charged to the 1.1V Boot voltage. Then, if there are no fault conditions, the SS/DEL ...

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ENABLE (VTT) 1.100V VDAC 3.85V 3.77V 3.10V 1.30V SS/DEL EAOOUT 1.100V IIN VOUT VRRDY START START DELAY (ENABLE ENDS 1.8ms (TD1) FAULT MODE) Figure 10a – Start-up Waveforms with Boot Mode (VID Setting > 1.1V) +12Vin 0.85V ENABLE ...

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Fault Modes Under Voltage Lock Out, VID = FAULT, as well as a low signal on the ENABLE input immediately sets the fault latch. This causes the EAOUT pin to drive low which turns off the Phase IC drivers. The ...

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Under Voltage Lockout (UVLO) The UVLO function monitors the IR3084U’s VCC supply pin and ensures that there is adequate voltage to safely power the internal circuitry. The IR3084U’s UVLO is set higher than the minimum operating voltage of compatible Phase ...

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System Reference Voltage (VBIAS) The IR3084U supplies a 6.8V/6mA precision reference voltage from the VBIAS pin. The oscillator ramp trip points are based on the VBIAS voltage so it should be used to program the Phase ICs phase delay to ...

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PERFORMANCE CHARACTERISTICS Figure 13: Oscillator Frequency versus ROSC 1000 900 800 700 600 500 400 300 200 100 ROSC (Kohms) Figure 15: I(VSETPT) versus ROSC 120 110 100 ...

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APPLICATIONS INFORMATION +12V CIN CCP 100pF RT R118 +5.0V 4.7K, B=4450 1.21K RCP CCP 2.49K 56nF RFB CFB 162 12nF EAOUT VRRDY 15 IIN RFB 19 RMPOUT C1010 348 20 VBIAS 100pF RDRP2 750 RDRP1 ...

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DESIGN PROCEDURES – IR3084U and IR3086 Chipset IR3084U EXTERNAL COMPONENTS Oscillator Resistor Rosc The oscillator of IR3084 generates a triangle waveform to synchronize the phase ICs, and the switching frequency of the each phase converter equals the oscillator frequency, which ...

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No Load Output Voltage Setting Resistor R An external resistor connected between the VDAC pin and the VSETPT pin is used to set the no load VSETPT output voltage offset, V which is the difference between the V ...

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Soft Start Capacitor C and Resistor R SS/DEL Because the capacitor C programs three different time parameters, i.e. soft start time, over current latch SS/DEL delay time, and the frequency of hiccup mode, they should be considered together while choosing ...

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Over Current Setting Resistor R OCSET The inductor DC resistance is utilized to sense the inductor current. The copper wire of the inductor has a constant temperature coefficient of 3850 PPM, and therefore the maximum inductor DCR can be calculated ...

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IR3086 EXTERNAL COMPONENTS PWM Ramp Resistor R and Capacitor C PWMRMP PWM ramp is generated by connecting the resistor R well as the capacitor C between PWMRMP and LGND. Choose the desired PWM ramp magnitude PWMRMP V and the capacitor ...

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Over Temperature Setting Resistors R The threshold voltage of VRHOT comparator is proportional to the die temperature T Determine the relationship between the die temperature of phase IC and the temperature of the power converter according to the power loss, ...

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Combining the Over Temperature and Phase Delay Setting Resistors R The over temperature setting resistor divider can be combined with the phase delay resistor divider to save one resistor per phase. Calculate the HOTSET threshold voltage V Equation (20). If ...

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VOLTAGE LOOP COMPENSATION The adaptive voltage positioning is used in the computer applications to meet the load line requirements. Like current mode control, the adaptive voltage positioning loop introduces extra zero to the voltage loop and splits the double poles ...

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Type III Compensation Determine the compensation at no load, the worst case condition. Choose the crossover frequency fc between 1/10 and 1/5 of the switching frequency per phase. Assume the time constant of the resistor and capacitor across the output ...

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DESIGN EXAMPLE: VRM 11 7−PHASE CONVERTER SPECIFICATIONS Input Voltage 12V I DAC Voltage 1.3V DAC No Load Output Voltage Offset: V O_NLOFST Output Current 130 ADC O Maximum Output Current 150 ADC ...

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Using the calculated value of C VDAC voltage of 1.300V during startup with Boot Mode using Equation 4a VDAC ∗ VDAC − I SOURCE No Load Output Voltage Setting Resistor RVSETPT, R First, use Equations ...

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Select RFB = 324 ohms and then calculate the droop resistor, VSETPT RDRP = RFB ⋅ D − VSETPT Choose the next standard value higher than this with 1% tolerance or RDRP = 787ohms. Soft Start Capacitor C and Startup ...

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Over Current Setting Resistor R OCSET Assume that room temperature is 25ºC and the target PCB temperature is 100 ºC. The phase IC die temperature is usually about 1 ºC higher than that of phase IC and the inductor temperature ...

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IR3086 PHASE IC COMPONENTS PWM Ramp Resistor R and Capacitor C RAMP Set the PWM ramp magnitude V PWMRMP calculate the resistor R using Equation (18); PWMRMP R = PWMRMP V ∗ f ∗ PWMRMP = 12 ...

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Phase Delay Timing Resistors RPHASEx1 to RPHASEx2 (x=1,2,…,7) The phase delay resistor ratios for phases 400kHz are (from the X−Phase Excel based design spreadsheet); RAPHASE1=0.580, RAPHASE2=0.397, RAPHASE3=0.215, RAPHASE4=0.206, RAPHASE5=0.353 RAPHASE6=0.5 and RAPHASE7=0.647. Pre−select RPHASE11=RPHASE21=RPHASE31=RPHASE41=RPHASE51=RPHASE61=RPHASE71=20k , RA ...

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CURRENT SHARE LOOP COMPENSATION The crossover frequency of the current share loop (f voltage loop f . Choose the crossover frequency of current share loop f C using Equations (34) and (35 PWMRMP PWMRMP F ...

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LAYOUT GUIDELINES The following layout guidelines are recommended to reduce the parasitic inductance and resistance of the PCB layout, therefore minimizing the noise coupled to the IC. Dedicate at least one middle layer for a ground plane LGND. • Connect ...

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METAL AND SOLDER RESIST • The solder resist should be pulled away from the metal lead lands by a minimum of 0.06mm. The solder resist mis-alignment is a maximum of 0.05mm and it is recommended that the lead lands are ...

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PCB METAL AND COMPONENT PLACEMENT • Lead land width should be equal to nominal part lead width. The minimum lead to lead spacing should be ≥ 0.2mm to minimize shorting. • Lead land length should be equal to maximum part ...

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STENCIL DESIGN • The stencil apertures for the lead lands should be approximately 80% of the area of the lead lands. Reducing the amount of solder deposited will minimize the occurrence of lead shorts. Since for 0.5mm pitch devices the ...

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PACKAGE INFORMATION 28L MLPQ ( Body) – θ WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 www.irf.com Page C/W, θ C/W ...