ADT7518ARQ-REEL Analog Devices Inc, ADT7518ARQ-REEL Datasheet - Page 30

IC SENSOR TEMP W/ADC/DAC 16QSOP

ADT7518ARQ-REEL

Manufacturer Part Number
ADT7518ARQ-REEL
Description
IC SENSOR TEMP W/ADC/DAC 16QSOP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADT7518ARQ-REEL

Rohs Status
RoHS non-compliant
Function
Temp Monitoring System (Sensor)
Topology
ADC, Comparator, Multiplexer, Register Bank
Sensor Type
External & Internal
Sensing Temperature
-40°C ~ 120°C, External Sensor
Output Type
I²C™, MICROWIRE™, QSPI™, SPI™
Output Alarm
No
Output Fan
No
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 120°C
Mounting Type
Surface Mount
Package / Case
16-QSOP
ADT7518
DAC Configuration Register (Read/Write)
[Address = 1Bh]
This configuration register is an 8-bit read/write register that is
used to control the output ranges of all four DACs and also to
control the loading of the DAC registers if the LDAC pin is
disabled (Bit C3 = 1, Control Configuration 3 register).
Table 35. DAC Configuration
D7
D7
0*
*
Table 36.
Bit
D0
D1
D2
D3
D5:D4
D6:D7
LDAC Configuration Register (Write-Only)
[Address = 1Ch]
This configuration register is an 8-bit write register that is used
to control the updating of the quad DAC outputs if the LDAC
pin is disabled and Bits D4:D5 of the DAC configuration reg-
ister are both set to 1. Also selects either the internal or external
V
ing, i.e., reading back from this register will always give 0s for
these bits.
Table 37. LDAC Configuration
D7
D7
0*
*
Default settings at power-up
Default settings at power-up
REF
for all four DACs. Bits D0:D3 in this register are self-clear-
D6
D6
0*
D6
D6
0*
Function
Selects the output range of DAC A.
0 = 0 V to V
1 = 0 V to 2V
Selects the output range of DAC B.
0 = 0 V to V
1 = 0 V to 2V
Selects the output range of DAC C.
0 = 0 V to V
1 = 0 V to 2V
Selects the output range of DAC D.
0 = 0 V to V
1 = 0 V to 2V
00 = A write to any DAC register generates LDAC
command that updates that DAC only.
01 = A write to DAC B or DAC D register generates
LDAC command that updates DACs A, B or DACs C, D,
respectively.
10 = A write to DAC D register generates LDAC
command that updates all four DACs.
11 = LDAC command generated from LDAC register.
Reserved. Write 0s only.
D5
D5
0*
D5
D5
0*
REF
REF
REF
REF
REF
REF
REF
REF
.
.
.
.
.
.
.
.
D4
D4
0*
D4
D4
0*
D3
D3
0*
D3
D3
0*
D2
D2
0*
D2
D2
0*
D1
D1
0*
D1
D1
0*
D0
D0
0*
D0
D0
0*
Rev. A | Page 30 of 40
Table 38.
Bit
D0
D1
D2
D3
D4
D5
D6:D7
Interrupt Mask 1 Register (Read/Write) [Address = 1Dh]
This mask register is an 8-bit read/write register that can be
used to mask any interrupts that can cause the INT/ INT pin to
go active.
Table 39. Interrupt Mask 1
D7
D7
0*
*
Table 40.
Bit
D0
D1
D2
D3
D4
D5
D6
D7
Default settings at power-up
Function
0 = Enable internal T
1 = Disable internal T
0 = Enable internal T
1 = Disable internal T
0 = Enable external T
1 = Disable external T
0 = Enable external T
1 = Disable external T
0 = Enable external temperature fault interrupt..
1 = Disable external temperature fault interrupt.
0 = Enable AIN2 interrupt.
1 = Disable AIN2 interrupt.
0 = Enable AIN3 interrupt.
1 = Disable AIN3 interrupt.
0 = Enable AIN4 interrupt.
1 = Disable AIN4 interrupt.
D6
D6
0*
Function
Writing a 1 to this bit will generate the LDAC command
to update DAC A output only.
Writing a 1 to this bit will generate the LDAC command
to update DAC B output only.
Writing a 1 to this bit will generate the LDAC command
to update DAC C output only.
Writing a 1 to this bit will generate the LDAC command
to update DAC D output only.
Selects either internal V
and B.
0 = External V
1 = Internal V
Selects either internal V
and D.
0 = External V
1 = Internal V
Reserved. Write 0s only.
D5
D5
0*
REF
REF
REF
REF
.
D4
D4
0*
HIGH
LOW
HIGH
LOW
HIGH
LOW
HIGH
LOW
interrupt.
interrupt.
interrupt.
interrupt.
interrupt or AIN1 interrupt.
interrupt.
interrupt.
interrupt or AIN1 interrupt.
REF
REF
D3
D3
0*
or external V
or external V
D2
D2
0*
REF
REF
for DACs C
for DACs A
D1
D1
0*
D0
D0
0*

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