ADT7473ARQZ-REEL7 ON Semiconductor, ADT7473ARQZ-REEL7 Datasheet - Page 62

• Manufacturer Part Number: ADT7473ARQZ-REEL7
• Description: IC REMOTE THERMAL CTRLR 16QSOP
• Manufacturer: ON Semiconductor
• Series: dBCool®r

Specifications of ADT7473ARQZ-REEL7

• Function: Fan Control, Temp Monitor
• Topology: ADC, Comparator, Fan Speed Counter, Multiplexer, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: -40°C ~ 125°C, External Sensor
• Output Type: SMBus™
• Output Alarm: No
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-QSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 30. Fan Tachometer Limit Registers
1. Exceeding any of the TACH limit registers by 1 indicates that the fan is running slowly or has stalled. The appropriate status bit is set in
Table 31. Register 0x55 — TACH1 Minimum High Byte (Power−On Default = 0xFF)
Table 32. PWM Configuration Registers
1. These registers become read−only when the Configuration Register 1 lock bit is set. Any further attempts to write to these registers have
Bit No.
[4:0]
[7:5]
Register Address
Interrupt Status Register 2 to indicate the fan failure. Setting the Configuration Register 1 lock bit has no effect on these registers.
no effect.
Register Address
0x5C
0x5D
0x5E
0x54
0x55
0x56
0x57
0x58
0x59
0x5A
0x5B
Mnemonic
Reserved
SCADC
R/W (Note 1)
Read−only
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
These bits are reserved when Bit 6 of Configuration Register 2 (0x73) is set (single−channel
ADC mode). Otherwise, these bits represent Bits [4:0] of the TACH1 minimum high byte.
When Bit 6 of Configuration Register 2 (0x73) is set (single−channel ADC mode), these bits
are used to select the only channel from which the ADC makes measurements. Otherwise,
these bits represent Bits [7:5] of the TACH1 minimum high byte.
PWM1 configuration.
PWM2 configuration.
PWM3 configuration.
(Note 1)
TACH1 minimum low byte.
TACH1 minimum high byte/single−channel ADC channel select.
TACH2 minimum low byte.
TACH2 minimum high byte.
TACH3 minimum low byte.
TACH3 minimum high byte.
TACH4 minimum low byte.
TACH4 minimum high byte.
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Description
62
Description
Description
ADT7473: 0x82
ADT7473−1: 0x62
ADT7473: 0x82
ADT7473−1: 0x62
ADT7473: 0x82
ADT7473−1: 0x62
Power−On Default
Power−On Default
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF