LT3150CGN#PBF Linear Technology, LT3150CGN#PBF Datasheet - Page 14

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LT3150CGN#PBF

Manufacturer Part Number
LT3150CGN#PBF
Description
IC CTRLR REG VLDO FET 16-SSOP
Manufacturer
Linear Technology
Type
Positive Adjustabler
Datasheet

Specifications of LT3150CGN#PBF

Number Of Outputs
1
Voltage - Output
2.5 ~ 18.4 V
Current - Supply
12mA
Voltage - Input
1.5 ~ 10 V, 10 ~ 20 V
Operating Temperature
0°C ~ 70°C
Package / Case
16-SSOP
Primary Input Voltage
10V
Dropout Voltage Vdo
130mV
No. Of Pins
16
Output Current
10A
Operating Temperature Range
0°C To +70°C
Msl
MSL 1 - Unlimited
Output Voltage Adjustable Min, Vout
1.5V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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APPLICATIO S I FOR ATIO
LT3150
Figures 1 and 2 show voltage coefficient and temperature
coefficient comparisons between Y5V and X5R material.
With the critical pole in the LT3150 feedback loop being set
by the absolute value of the output capacitor, it is obvious
why Linear Technology strongly recommends the use of
ceramic capacitors with X5R or X7R dielectric material.
MOSFET Selection
MOSFET selection criteria include threshold voltage
V
tance R
package thermal resistance R
Linear Technology recommends the use of a logic-level
threshold MOSFET in LT3150 applications. The V
as defined by the threshold voltage and the load current
range, fits well within the boost regulator’s capability and
the output swing range of the error amplifier. The MOSFET’s
continuous drain current rating must equal or exceed the
maximum load current and the maximum drain-to-source
voltage must exceed the maximum input voltage.
The most critical specification is the MOSFET R
Calculate the required R
The additional factor of three in the equation’s denomina-
tor accounts for production variation, the temperature
coefficient of R
output load steps and other operating point characteris-
14
GS(TH)
MOSFET R
Figure 1. Ceramic Capacitor DC Bias Characteristics
DS(ON)
, maximum continuous drain current I
–100
–20
–40
–60
–80
20
0
0
, maximum drain-to-source voltage V
DS(ON)
DS(ON)
2
U
4
, voltage dips in V
DC BIAS VOLTAGE (V)
DS(ON)
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10 F
V
6
IN MIN
U
(
• 3
8
Y5V
X5R
TH(JA)
from the following formula:
I
)
OUT MAX
10
V
(
12
W
.
OUT MIN
IN
14
(
)
3150 F01
during transient
16
)
D
U
, on-resis-
GS
DS(ON)
DS
range,
and
.
tics. Although the factor of three is slightly conservative,
this imposes no cost penalty. As an example, consider the
1.8V to 1.5V at 4A application on the front page. Assuming
the 1.8V input and the 1.5V output each have a 5%
tolerance,
A Siliconix Si4410 MOSFET with an R
close match. Although the Si4410’s 30V maximum V
and 8A maximum I
requirements, the Si4410’s low cost makes it an excellent
choice.
As the final criteria, consider the thermal resistance R
of the MOSFET’s package. The temperature rise in the
MOSFET must be kept under control and within the
manufacturer’s maximum junction temperature specifica-
tion. The power dissipated in the MOSFET is calculated by:
In the design example, P
1.2W. The Si4410’s R
age, which translates to a 60 C temperature rise above
ambient. MOSFET manufacturers have significantly low-
ered the thermal resistance of modern devices with im-
proved packages. These packages provide exposed
backsides that directly transfer heat to the PCB board.
These packages enable LT3150 applications with much
higher output currents while keeping the MOSFET tem-
perature in control.
P
R
Figure 2. Ceramic Capacitor Temperature Characteristics
MOSFET
DS(ON)
–100
–20
–40
–60
–80
40
20
= (V
0
–50
( .
0 95 1 8
IN
–25
– V
• .
D
OUT
0
TH(JA)
TEMPERATURE ( C)
ratings exceed the application’s
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10 F
V
) • I
3 4
MOSFET
25
) – ( .
is 50 C/W for its S0-8 pack-
OUT
50
A
0 95 1 5
Y5V
= (1.8V – 1.5V) • 4A =
75
• .
X5R
DS(ON)
100
V
3150 F02
)
125
of 20m is a
23 8
.
m
TH(JA)
3150f
DS

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