LTC3722EGN-2#TR Linear Technology, LTC3722EGN-2#TR Datasheet - Page 20

IC CTRLR PWM VOLTAGE-MODE 24SSOP

LTC3722EGN-2#TR

Manufacturer Part Number
LTC3722EGN-2#TR
Description
IC CTRLR PWM VOLTAGE-MODE 24SSOP
Manufacturer
Linear Technology
Datasheet

Specifications of LTC3722EGN-2#TR

Pwm Type
Voltage Mode, Full Bridge
Number Of Outputs
1
Frequency - Max
1MHz
Duty Cycle
98.5%
Voltage - Supply
3.8 V ~ 10.3 V
Buck
No
Boost
No
Flyback
No
Inverting
No
Doubler
No
Divider
Yes
Cuk
No
Isolated
Yes
Operating Temperature
-40°C ~ 85°C
Package / Case
24-SSOP
Frequency-max
1MHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LTC3722EGN-2#TRLTC3722EGN-2
Manufacturer:
LINEAR/凌特
Quantity:
20 000
LTC3722-1/LTC3722-2
operaTion
output current for the converter can be delivered at the
lowest expected V
the optimal value for R
doubler secondary.
LTC3722-1:
LTC3722-2:
Current Transformer Sensing
A current sense transformer can be used in lieu of resistive
sensing with the LTC3722-1/LTC3722-2. Current sense
transformers are available in many styles from several
manufacturers. A typical sense transformer for this ap-
plication will use a 1:50 turns ratio (N), so that the sense
resistor value is N times larger, and the secondary current
N times smaller than in the resistive sense case. Therefore,
the sense resistor power loss is about N times less with
the transformer method, neglecting the transformers core
and copper losses. The disadvantages of this approach
include, higher cost and complexity, lower accuracy,
core reset/maximum duty cycle limitations and lower
speed. Nevertheless, for very high power applications,
this method is preferred. The sense transformer primary
is placed in the same location as the ground referenced
sense resistor, or between the upper MOSFET drains in
the (MA, MC) and V
0
I PEAK
R
R
where N Transformer turns ratio
P
CS
CS
(
=
=
I PEAK
300
:
P
300
)
(
=
=
mV
L
mV
2
OUT
V
IN
I
O
– (
O O MAX
)
. Use the following formula to calculate
N
IN
(
(
I PEAK
1 1 –
P
82 5
.
(
f
CS
CLK
D
.
EFF
)
MIN
. I
µA R
P
)
+
)
equation valid for current
N
L
V
MAG
IN MAX
SLOPE
(
)
f
)
CLK
D
=
MIN
N
N
2
P
S
+
The advantage of the high side location is a greater im-
munity to leading edge noise spikes, since gate charge
current and reflected rectifier recovery current are largely
eliminated. Figure 11 illustrates a typical current sense
transformer based sensing scheme. R
calculated the same as in the resistive case, only its value
is increased by the sense transformer turns ratio. At high
duty cycles, it may become difficult or impossible to re-
set the current transformer. This is because the required
transformer reset voltage increases as the available time
for reset decreases to equalize the (volt • seconds) applied.
The interwinding capacitance and secondary inductance of
the current sense transformer form a resonant circuit that
limits the dV/dT on the secondary of the CS transformer.
This, in turn, limits the maximum achievable duty cycle for
the CS transformer. Attempts to operate beyond this limit
will cause the transformer core to “walk” and eventually
saturate, opening up the current feedback loop.
Common methods to address this limitation include:
1. Reducing the maximum duty cycle by lowering the
2. Reducing the switching frequency of the converter.
3. Employ external active reset circuitry.
4. Using two CS transformers summed together.
5. Choose a CS transformer optimized for high frequency
RAMP
power transformer turns ratio.
applications.
CS
Figure 11. Current Transformer Sense Circuitry
OPTIONAL
FILTERING
R
SLOPE
SOURCE
R
S
MB
N:1
S
CURRENT
TRANSFORMER
in this case is
MD
SOURCE
372212 F11
372212fa

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