LT3689EMSE-5#PBF Linear Technology, LT3689EMSE-5#PBF Datasheet - Page 9

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LT3689EMSE-5#PBF

Manufacturer Part Number
LT3689EMSE-5#PBF
Description
IC BUCK 5V 0.7A 16MSOP
Manufacturer
Linear Technology
Type
Step-Down (Buck)r
Datasheet

Specifications of LT3689EMSE-5#PBF

Internal Switch(s)
Yes
Synchronous Rectifier
No
Number Of Outputs
1
Voltage - Output
5V
Current - Output
700mA
Frequency - Switching
350kHz ~ 2.2MHz
Voltage - Input
3.6 ~ 36 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-MSOP Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-

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PIN FUNCTIONS
BST: The BST pin is used to provide drive voltage higher
than the input voltage to the internal NPN power switch.
V
circuitry and to the internal power switch and must be
locally bypassed.
SW: The SW pin is the output of the internal power switch.
Connect this pin to the inductor, catch diode and boost
capacitor.
DA: Tie the DA pin to the anode of the external catch
Schottky diode. If the DA pin current exceeds 1.2A,
which could occur in an overload or short-circuit condi-
tion, switching is disabled until the DA pin current falls
below 1.2A.
EN/UVLO: The EN/UVLO pin is used to put the LT3689 in
shutdown mode. Pull the pin below 0.3V to shut down the
LT3689. The 1.26V threshold can function as an accurate
undervoltage lockout (UVLO), preventing the regulator
from operating until the input voltage has reached the
programmed level.
FB: The LT3689 regulates the feedback pin to 0.800V. Con-
nect the feedback resistor divider tap to this pin. For the
fixed LT3689-5 output, this pin can be used to connect a
phase lead capacitor between the OUT pin and FB pin to
optimize transient response.
WDE: Watchdog Timer Enable Pin. This pin disables the
watchdog timer if the WDE voltage exceeds 1V. WDO is
high in this condition.
W/T: Setting W/T low puts the LT3689 watchdog timer into
window mode. If two or more negative edges occur on
WDI before the watchdog lower boundary (t
expires, or no negative edge occurs within the watchdog
upper boundary (t
W/T is set high, the part will only set WDO low if no transi-
tion occurs within the watchdog upper boundary period.
WDI: Watchdog Timer Input Pin. This pin receives the
watchdog signal from a microprocessor. If the appropriate
signal is not received, the part will pulse WDO low for a
period equal to the reset timeout period. The watchdog
timer is disabled until the WDO pin goes high again.
IN
: The V
IN
pin supplies current to the LT3689’s internal
WDU
) period, the part will set WDO low. If
WDL
) period
RST: Active low, open collector logic output with a weak
pull-up to V
grammed value, the reset remains asserted for the period
set by the capacitor on the C
WDO: Active low, open collector logic output with weak
pull-up to V
and the microprocessor fails to drive the WDI pin of the
LT3689 with an appropriate signal.
C
citor (C
watchdog upper and lower boundary period. To determine
the watchdog upper boundary period, and the lower bound-
ary period, use the following equations:
t
a 47nF capacitor will generate an 855ms watchdog upper
boundary period and a 27.6ms watchdog lower boundary
period.
C
external capacitor (C
of 2.3ms/nF .
RT: Sets the Internal Oscillator Frequency. Tie a 31.6k
resistor from RT to GND for a 500kHz switching frequency.
SYNC: Drive the SYNC pin with a logic level signal with
positive and negative pulse widths of at least 80ns. The
R
frequency at least 20% below the lowest synchronization
input frequency.
OUT: The OUT pin supplies current to the internal circuitry
when OUT is above 3V, reducing input quiescent current.
The internal Schottky diode is connected from OUT to BST,
providing the charging path for the boost capacitor. For
the LT3689-5, this pin connects to the internal feedback
divider that programs the fixed 5V output.
GND: Ground. Tie the exposed pad directly to the ground
plane. The exposed pad metal of the package provides both
electrical contact to ground and good thermal contact to
the printed circuit board. The device must be soldered to
the circuit board for proper operation.
WDU
WDT
POR
T
t
t
resistor should be chosen to set the LT3689 switching
WDU
WDL
: Reset Delay Timer Programming Pin. Attach an
and t
: Watchdog Timer Programming Pin. Place a capa-
WDT
= 0.588 • C
= 18.2 • C
WDL
) between this pin and ground to adjust the
OUT
OUT
are in ms and C
. After V
. WDO pulls low if the WDE is enabled
WDT
WDT
POR
(watchdog upper boundary period)
(watchdog lower boundary period)
LT3689/LT3689-5
OUT
) to GND to set a reset delay time
rises above 90% of its pro-
POR
WDT
pin.
is in nF . As an example,
3689fd
9

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