LT3437IFE#TRPBF Linear Technology, LT3437IFE#TRPBF Datasheet - Page 17

• Manufacturer Part Number: LT3437IFE#TRPBF
• Description: IC REG SW HV 500MA 16-TSSOP
• Manufacturer: Linear Technology
• Type: Step-Down (Buck)r

Specifications of LT3437IFE#TRPBF

• Internal Switch(s): Yes
• Synchronous Rectifier: No
• Number Of Outputs: 1
• Voltage - Output: 1.25 ~ 54 V
• Current - Output: 500mA
• Frequency - Switching: 200kHz
• Voltage - Input: 3.3 ~ 60 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP Exposed Pad, 16-eTSSOP, 16-HTSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -

APPLICATIO S I FOR ATIO
Burst Mode OPERATION
To enhance efficiency at light loads, the LT3437 automati-
cally switches to Burst Mode operation which keeps the
output capacitor charged to the proper voltage while
minimizing the input quiescent current. During Burst
Mode operation, the LT3437 delivers short bursts of
current to the output capacitor followed by sleep periods
where the output power is delivered to the load by the
output capacitor. In addition, V
currents are reduced to typically 45µA and 110µA, respec-
tively, during the sleep time. As the load current decreases
towards a no load condition, the percentage of time that
the LT3437 operates in sleep mode increases and the
average input current is greatly reduced, resulting in
higher efficiency.
The minimum average input current depends on the V
V
network and Schottky diode leakage. It can be approxi-
mated by the following equation:
where
Example: For V
OUT
I
IN AVG
I
V
V
I
I
I
η = low current efficiency (non Burst Mode operation)
I
IN AVG
VINS
BIASS
FB
S
OUT
IN
(
(
= catch diode reverse leakage at V
ratio, V
= feedback network current
= input voltage
= input pin current in sleep mode
)
= output voltage
= BIAS pin current in sleep mode
=
)
≅
45
≅
45
C
I
µ + µ +
VINS
µ + µ +
frequency compensation, feedback divider
A
A
OUT
5
+
5
= 3.3V, V
U
I
A
SHDN
A
42
⎛
⎝ ⎜
3 3
U
12
µ =
+
.
A
⎛
⎜
⎝
IN
⎞
⎠ ⎟
V
(
= 12V
V
OUT
110
92
IN
IN
µ
µ +
A
W
⎞
⎟
⎠
and BIAS quiescent
A
(
I
BIASS
OUT
12 5
( )
0 8
.
.
( )
µ +
+
η
A
I
FB
U
0. .
+
5
I
µ
S
IN
A
)
to
)
During the sleep portion of the Burst Mode cycle, the V
pin voltage is held just below the level needed for normal
operation to improve transient response. See the Typical
Performance Characteristics section for burst and tran-
sient response waveforms.
If Burst Mode operation is undesirable, it can be defeated
by placing 2V or greater on the SYNC pin. When Burst
Mode operation is defeated, output ripple at light loads will
be reduced at the expense of light load efficiency.
CATCH DIODE
The catch diode carries load current during the SW off
time. The average diode current is therefore dependent on
the switch duty cycle. At high input to output voltage
ratios, the diode conducts most of the time. As the ratio
approaches unity, the diode conducts only a small fraction
of the time. The most stressful condition for the diode is
when the output is short circuited. Under this condition,
the diode must safely handle I
To maximize high and low load current efficiency, a fast
switching diode with low forward drop and low reverse
leakage should be used. Low reverse leakage is critical to
maximize low current efficiency since its value over tem-
perature can potentially exceed the magnitude of the
LT3437 supply current. Low forward drop is critical for
high current efficiency since the loss is proportional to
forward drop.
200
180
160
140
120
100
80
60
40
20
0
0
10
20
Figure 5. I
INPUT VOLTAGE (V)
30
40
PEAK
Q
vs V
50
at maximum duty cycle.
V
IN
60
OUT
= 3.3V
70
3435 F05
80
LT3437
17
3437fc
C