LTC3713EG Linear Technology, LTC3713EG Datasheet - Page 9

IC DC/DC CONTROLLER SYNC 24-SSOP

LTC3713EG

Manufacturer Part Number
LTC3713EG
Description
IC DC/DC CONTROLLER SYNC 24-SSOP
Manufacturer
Linear Technology
Type
Step-Down (Buck)r
Datasheet

Specifications of LTC3713EG

Internal Switch(s)
No
Synchronous Rectifier
Yes
Number Of Outputs
1
Voltage - Output
0.8 ~ 32.4 V
Current - Output
2A
Voltage - Input
1.5 ~ 36 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-SSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power - Output
-
Frequency - Switching
-

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OPERATIO
Main Control Loop
The LTC3713 is a current mode controller for DC/DC
step-down converters designed to operate from low input
voltages. It incorporates a boost converter with a buck
regulator.
Buck Regulator Operation
In normal operation, the top MOSFET is turned on for a
fixed interval determined by a one-shot timer OST. When
the top MOSFET is turned off, the bottom MOSFET is
turned on until the current comparator I
ing the one-shot timer and initiating the next cycle. Induc-
tor current is determined by sensing the voltage between
the SENSE
on-resistance . The voltage on the I
parator threshold corresponding to inductor valley cur-
rent. The error amplifier EA adjusts this voltage by com-
paring the feedback signal V
with an internal 0.8V reference. If the load current in-
creases, it causes a drop in the feedback voltage relative to
the reference. The I
inductor current again matches the load current.
At low load currents, the inductor current can drop to zero
and become negative. This is detected by current reversal
comparator I
discontinuous operation. Both switches will remain off
with the output capacitor supplying the load current until
the I
initiate another cycle. Discontinuous mode operation is
disabled by comparator F when the FCB pin is brought
below 0.8V, forcing continuous synchronous operation.
The operating frequency is determined implicitly by the
top MOSFET on-time and the duty cycle required to
maintain regulation. The one-shot timer generates an on-
time that is proportional to the ideal duty cycle, thus
holding frequency approximately constant with changes
in V
external resistor R
Overvoltage and undervoltage comparators OV and UV
pull the PGOOD output low if the output feedback voltage
exits a
Furthermore, in an overvoltage condition, M1 is turned off
IN
TH
. The nominal frequency can be adjusted with an
voltage rises above the zero current level (0.8V) to
7.5% window around the regulation point.
+
and SENSE
REV
U
which then shuts off M2, resulting in
ON
TH
.
voltage then rises until the average
pins using the bottom MOSFET
FB1
from the output voltage
TH
pin sets the com-
CMP
trips, restart-
and M2 is turned on and held on until the overvoltage
condition clears.
Foldback current limiting is provided if the output is
shorted to ground. As V
threshold voltage I
level set by Q4 and Q6. This reduces the inductor valley
current level to one sixth of its maximum value as V
approaches 0V.
Pulling the RUN/SS pin low forces the controller into its
shutdown state, turning off both M1 and M2. Releasing
the pin allows an internal 1.2 A current source to charge
up an external soft-start capacitor C
reaches 1.5V, the controller turns on and begins switch-
ing, but with the I
0.6V below the RUN/SS voltage. As C
charge, the soft-start current limit is removed.
INTV
Power for the top and bottom MOSFET drivers and most
of the internal controller circuitry is derived from the
INTV
floating bootstrap capacitor C
charged from INTV
D
Boost Regulator Operation
The 5V power source for INTV
current mode, internally compensated fixed frequency
step-up switching regulator that has been incorporated
into the LTC3713.
Operation can be best understood by referring to the
Functional Diagrams. Q1 and Q2 form a bandgap refer-
ence core whose loop is closed around the output of the
regulator. The voltage drop across R5 and R6 is low
enough such that Q1 and Q2 do not saturate, even when
V
1.23V, causing V
crease. Comparator A2’s output stays high, keeping switch
Q3 in the off state. As increased output loading causes the
V
current is regulated directly on a cycle-by-cycle basis by
the V
IN2
FB2
B
when the top MOSFET is turned off.
is 1V. When there is no load, V
CC
CC
C
voltage to decrease, A1’s output increases. Switch
node. The flip-flop is set at the beginning of each
Power
pin. The top MOSFET driver is powered from a
C
THB
TH
CC
(the error amplifier’s output) to de-
through an external Schottky diode
voltage clamped at approximately
is pulled down by clamp Q3 to a 1V
FB1
drops, the buffered current
CC
B
. This capacitor is re-
FB2
can be provided by a
SS
. When this voltage
rises slightly above
SS
LTC3713
continues to
3713fa
9
FB1

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