LT3431EFE Linear Technology, LT3431EFE Datasheet - Page 16

• Manufacturer Part Number: LT3431EFE
• Description: IC SW REG STEP-DOWN 3A 16TSSOP
• Manufacturer: Linear Technology
• Type: Step-Down (Buck)r

Specifications of LT3431EFE

• Internal Switch(s): Yes
• Synchronous Rectifier: No
• Number Of Outputs: 1
• Voltage - Output: 1.2 ~ 48 V
• Current - Output: 3A
• Frequency - Switching: 500kHz
• Voltage - Input: 5.5 ~ 60 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP Exposed Pad, 16-eTSSOP, 16-HTSSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power - Output: -

LT3431
APPLICATIO S I FOR ATIO
Threshold voltage for lockout is about 2.38V. A 5.5 A bias
current flows out of the pin at this threshold. The internally
generated current is used to force a default high state on
the shutdown pin if the pin is left open. When low shut-
down current is not an issue, the error due to this current
can be minimized by making R
current is an issue, R
due to initial bias current and changes with temperature
should be considered.
Keep the connections from the resistors to the shutdown
pin short and make sure that interplane or surface capaci-
tance to the switching nodes are minimized. If high
resistor values are used, the shutdown pin should be
bypassed with a 1000pF capacitor to prevent coupling
problems from the switch node. If hysteresis is desired in
the undervoltage lockout point, a resistor R
added to the output node. Resistor values can be calcu-
lated from:
16
V
R
R
R
R
IN
LO
HI
HI
FB
= Minimum input voltage
R
2 38
10
R
.
R
LO IN
HI
k
LO
V R
to 100k 25k suggested
V
V
V
OUT
IN
2 38
U
.
LO
2 38
LO
/
.
2 38
can be raised to 100k, but the error
.
5 5
INPUT
V
.
R
U
V
LO
V V
A
C2
/
5 5
LO
OUT
.
R
R
10k or less. If shutdown
LO
HI
W
A
1
IN
SHDN
LT3431
V
Figure 4. Undervoltage Lockout
U
FB
5.5 A
can be
2.38V
0.4V
GND
R
FB
+
–
+
–
Example: output voltage is 5V, switching is to stop if input
voltage drops below 12V and should not restart unless
input rises back to 13.5V. V is therefore 1.5V and
V
SYNCHRONIZING
The SYNC input must pass from a logic level low, through
the maximum synchronization threshold with a duty cycle
between 10% and 90%. The input can be driven directly
from a logic level output. The synchronizing range is equal
to initial operating frequency up to 700kHz. This means
that minimum practical sync frequency is equal to the
worst-case high self-oscillating frequency (570kHz), not
the typical operating frequency of 500kHz. Caution should
be used when synchronizing above 662kHz because at
higher sync frequencies the amplitude of the internal slope
compensation used to prevent subharmonic switching is
IN
25k suggested for R
V
R
R
= 12V. Let R
IN
V = Hysteresis in input voltage level
HI
FB
= Input voltage at which switching stops as input
voltage descends to trip level
STANDBY
TOTAL
SHUTDOWN
25 10 41
25 12 2 38 1 5 5 1 1 5
116 5 1 5
k
k
2 24
k
.
2 38 25 5 5
V
SW
LO
.
.
/ .
= 25k.
.
–
L1
LO
116
387
k
+
. /
k
3431 F04
k
C1
.
OUTPUT
A
.
sn3431 3431fs