LTC3857IUH#TRPBF Linear Technology, LTC3857IUH#TRPBF Datasheet - Page 27

• Manufacturer Part Number: LTC3857IUH#TRPBF
• Description: IC CTRLR STP-DN SYNC DUAL 32QFN
• Manufacturer: Linear Technology
• Series: PolyPhase®r
• Type: Step-Down (Buck)r

Specifications of LTC3857IUH#TRPBF

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 2
• Voltage - Output: 0.8 ~ 24 V
• Frequency - Switching: 50kHz ~ 900kHz
• Voltage - Input: 4 ~ 38 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 32-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output: -
• Power - Output: -

APPLICATIONS INFORMATION
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the IC. These items are also illustrated graphically in the
layout diagram of Figure 11. Figure 12 illustrates the current
waveforms present in the various branches of the 2-phase
synchronous regulators operating in the continuous mode.
Check the following in your layout:
1. Are the top N-channel MOSFETs MTOP1 and MTOP2
located within 1cm of each other with a common drain
connection at C
decoupling for the two channels as it can cause a large
resonant loop.
IN
? Do not attempt to split the input
f
IN
I
V
SENSE1
SENSE1
FREQ
PHASMD
CLKOUT
PLLIN/MODE
RUN1
RUN2
SGND
SENSE2
SENSE2
V
I
TRACK/SS2
TH1
TH2
FB1
FB2
Figure 11. Recommended Printed Circuit Layout Diagram
+
–
LTC3857
–
+
TRACK/SS1
PGOOD2
PGOOD1
BOOST1
BOOST2
EXTV
INTV
PGND
SW1
SW2
ILIM
BG1
BG2
TG1
TG2
V
CC
CC
IN
R
PGOOD2
PU2
2. Are the signal and power grounds kept separate? The
3. Do the LTC3857 V
combined IC signal ground pin and the ground return
of C
minals. The path formed by the top N-channel MOSFET,
Schottky diode and the C
leads and PC trace lengths. The output capacitor (–)
terminals should be connected as close as possible
to the (–) terminals of the input capacitor by placing
the capacitors next to each other and away from the
Schottky loop described above.
the (+) terminals of C
connected between the (+) terminal of C
ground. The feedback resistor connections should not
be along the high current input feeds from the input
capacitor(s).
C
C
V
C
B2
B1
PULL-UP
INTVCC
INTVCC
R
PGOOD1
PU1
must return to the combined C
C
CERAMIC
VIN
V
R
M1
V
M3
IN
IN
PULL-UP
1μF
FB
CERAMIC
pins’ resistive dividers connect to
OUT
+
M2
M4
1μF
C
L1
L2
IN
? The resistive divider must be
IN
capacitor should have short
R
R
SENSE
SENSE
C
C
OUT1
OUT2
D1
D2
+
+
3857 F11
LTC3857
OUT
V
GND
V
OUT
OUT1
OUT2
and signal
27
(–) ter-
3857fc