LTC1142HVCG Linear Technology, LTC1142HVCG Datasheet - Page 14

• Manufacturer Part Number: LTC1142HVCG
• Description: IC SW REG STEP-DOWN DUAL 28-SSOP
• Manufacturer: Linear Technology
• Type: Step-Down (Buck)r

Specifications of LTC1142HVCG

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 2
• Voltage - Output: 3.3V, 5V
• Current - Output: 50mA
• Frequency - Switching: 250kHz
• Voltage - Input: 3.5 ~ 18 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-SSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power - Output: -

APPLICATIO S I FOR ATIO
LTC1142/LTC1142L/LTC1142HV
Figure 5 shows how the efficiency losses in one section of
a typical LTC1142 regulator end up being apportioned.
The gate charge loss is responsible for the majority of the
efficiency lost in the mid-current region. If Burst Mode
operation was not employed at low currents, the gate
charge loss alone would cause efficiency to drop to
unacceptable levels. With Burst Mode operation, the DC
supply current represents the lone (and unavoidable) loss
component which continues to become a higher percent-
age as output current is reduced. As expected, the I
losses dominate at high load currents.
Other losses including C
losses, MOSFET switching losses, Schottky conduction
losses during dead-time and inductor core losses, gener-
ally account for less than 2% total additional loss.
Design Example
As a design example, assume V
section, I
immediately be calculated:
Assume that the MOSFET dissipations are to be limited to
P
If T
is 50 C/ W, then the junction temperatures will be 63 C
14
N
R
t
C
L2
= P
A
OFF
T5
SENSE
= 50 C and the thermal resistance of each MOSFET
MIN
P
= 2.92 s/(1.3 • 10
= (1/200kHz) • [1 – (5/12)] = 2.92 s
= 250mW.
MAX
= 5.1 • 10
= 100mV/2 = 0.05
100
85
80
95
90
0.01
= 2A and f = 200kHz; R
1/2 LTC1142 I
GATE CHARGE
Figure 5. Efficiency Loss
5
U
0.03
• 0.05 • 220pF • 5V = 28 H
OUTPUT CURRENT (A)
4
Q
0.1
U
) = 220pF
IN
and C
0.3
IN
W
OUT
= 12V (nominal), 5V
SENSE
1
ESR dissipative
I
1142 F05
2
R
, C
3
T
and L can
U
2
R
and
for each MOSFET can now be calculated:
The P-channel requirement can be met by a Si9430DY,
while the N-channel requirement is exceeded by a
Si9410DY. Note that the most stringent requirement for
the N-channel MOSFET is with V
During a continuous short circuit, the worst case
N-channel dissipation rises to:
With the 0.05 sense resistor, I
increasing the 0.085 N-channel dissipation to 450mW at
a die temperature of 73 C.
C
temperature, and C
optimum efficiency.
Now allow V
voltages the operating frequency will decrease and the
P-channel will be conducting most of the time, causing its
power dissipation to increase. At V
A similar calculation for the 3.3V section results in the
component values shown in Figure 14.
LTC1142HV-ADJ/LTC1142L-ADJ
Adjustable Applications
When an output voltage other than 3.3V or 5V is required,
the LTC1142 adjustable version is used with an external
resistive divider from V
lated output voltage is determined by:
IN
P
P Ch
N - Ch R
P
V
f
will require an RMS current rating of at least 1A at
MIN
N
P
OUT
-
P
= I
=
= (1/2.92 s)[1 – (5V/ 7V)] = 98kHz
5 0 12
SC(AVG)
R
V
N
1 25 1
DS(ON)
DS(ON)
( .
= 0.007(63 – 25) = 0.27. The required R
IN
.
to drop to its minimum value. At lower input
2
• R
7
)(
OUT
V
DS(ON)
2
R
5 2 1 27
5 2 1 27
R
( ) ( . )
( ) ( . )
A
12 0 25
12 0 25
2
1
) ( . )
OUT
will require an ESR of 0.05 for
2
( . )
( . )
2
2
1 27
• (1 +
to V
OUT
FB
SC(AVG)
, Pin 2 (16). The regu-
435
N
IN(MIN)
0 12
= 0 (i.e., short circuit).
0 085
)
.
.
mV
= 2A will result,
= 7V:
DS(ON)