IR3623MPBF International Rectifier, IR3623MPBF Datasheet - Page 15

• Manufacturer Part Number: IR3623MPBF
• Description: IC CTLR 2PH SYNC STEPDOWN 32MLPQ
• Manufacturer: International Rectifier
• Type: Step-Down (Buck)r

Specifications of IR3623MPBF

• Internal Switch(s): No
• Synchronous Rectifier: No
• Number Of Outputs: 2
• Voltage - Output: Adj to 0.8V
• Current - Output: 200mA
• Frequency - Switching: 200kHz ~ 1.2MHz
• Voltage - Input: 8.5 ~ 14.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 32-MLPQ
• Package: 32-Lead MLPQ
• Circuit: 2 Channel or 2 Phase Sync PWM Controller
• Vcc (min): 8.5
• Vcc (max): 14.5
• Switch Freq (khz): 200kHz to 1.2MHz
• Pbf: PbF Option Available
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -

The critical inductor current can be calculated by
setting:
Over-Current Protection
The over current protection is performed by
sensing current through the R
MOSFET. This method enhances the converter’s
efficiency and reduce cost by eliminating a
current sense resistor. As shown in figure 13, an
external resistor (R
OCSet pin and the drain of low side MOSFET
(Q2) which sets the current limit set point.
The internal current source develops a voltage
across R
turned on, the inductor current flows through the
Q2 and results a voltage which is given by:
An over current is detected if the OCSet pin goes
below ground. This trips the OCP comparator
and cycles the soft start function in hiccup mode.
The hiccup is performed by charging and
discharging the soft-start capacitor in certain
slope rate. As shown in figure 14 a 3uA current
source is used to discharge the soft-start
capacitor.
The OCP comparator resets after every soft start
cycles, the converter stays in this mode until the
overload or short circuit is removed. The
converter will automatically recover.
During this fault condition the Ph_En signal is low
and PWM output is on Tri-state, see figure 12.
Fig. 13: Connection of over current sensing resistor
www.irf.com
Hiccup
Control
V
OCSet
I
V
SET
IR3623
OCSet
=
SET
(I
=
OCSet
I
=
L
. When the low side MOSFET is
(
critical
(I
I
∗
OCSET
OCSet
R
)
=
OCSet
∗
R
R
SET
OCSet
)
OCSet
R
−
DS
) is connected between
OCSet
OCGnd
(R
∗
(
)
on
I
DS(on)
OCSet
−
)
(R
R
SET
∗
DS(on)
) I
DS(on)
L
-
∗
IP200x
- -
) I
Q1
Q2
L
( -
-
of low side
=
- -
) 7
0
( -
) 6
L1
V
OUT
The OCP circuit starts sampling current 200ns
(typical) after PWM signal goes high. The OCSet
pin is internally clamped to prevent false trigging,
figure 15 shows the OCSet pin during one
switching cycle.
The value of R
circuit to ensure that the over current protection
circuit activates as expected. The IR3623 current
limit is designed primarily as disaster preventing,
"no blow up" circuit, and doesn't operate as a
precision current regulator.
When the SS2 is floating over current on either
phase would result to hiccup of output voltage.
Fig. 14: 3uA current source for discharging
Ch1: Inductor point, Ch2:Ldrv, Ch3:OCSet
Fig. 15: OCset pin during normal condition
I
soft-start capacitor during hiccup
OCset
SS1 / SD
* R
OCset
SET
22uA
20
should be checked in an actual
28uA
3uA
IR3623MPbF
OCP
15