CS51033GD8G ON Semiconductor, CS51033GD8G Datasheet - Page 6

• Manufacturer Part Number: CS51033GD8G
• Description: IC CTRLR PFET BUCK FAST 8-SOIC
• Manufacturer: ON Semiconductor
• Type: Step-Down (Buck)r

Specifications of CS51033GD8G

• Internal Switch(s): No
• Synchronous Rectifier: No
• Number Of Outputs: 1
• Voltage - Output: 1.5V
• Current - Output: 200mA
• Frequency - Switching: 200kHz
• Voltage - Input: 3.14 ~ 3.47 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Buck Regulator Operation
Figure 4. If we assume that the output transistor is initially
off, and the system is in discontinuous operation, the
inductor current I
nominal value. The current drawn by the load is supplied by
the output capacitor C
below the threshold established by the feedback resistors R1
Charge Pump Circuit
input voltage is below 5.0 V to ensure that there is suffifient
gate drive voltage for the external FET. When V
capacitors C1 and C2 will be charged to a diodes drop below
V
IN
A block diagram of a typical buck regulator is shown in
(Refer to the CS51033 Application Diagram on page 2).
An external charge pump circuit is necessary when the V
via diodes D2 and D4, respectively. When the P−Ch
L
is zero and the output voltage is at its
V
O
IN
. When the voltage across C
C
IN
Control
Q
Figure 4. Buck Regulator Block Diagram
1
IN
is applied,
Feedback
O
http://onsemi.com
drops
D
CS51033
1
C
6
and R2 and the reference voltage V
Q1 switches on and current flows through the inductor to the
output. The inductor current rises at a rate determined by
(V
CS51033 is limited to 80%. If output voltage remains higher
than nominal during the entire C
does not turn on, skipping the pulse.
FET turns on, it’s drain voltage will be approximately equal
to V
instantaneously, D2 is reverse biased and the anode voltage
rises to approximately 2.0 × 3.3 V − VD2. C1 transfers some
of its stored charge C2 via D3. After several cycles there is
sufficient gate drive voltage.
L
IN
− V
IN
. Since the voltage across C1 can not change
OUT
R
R
1
2
)/Load. The duty cycle (or “on” time) for the
C
O
R
LOAD
OSC
REF
, the power transistor
change time, the Q1