LTM4614IV#PBF Linear Technology, LTM4614IV#PBF Datasheet - Page 15

IC UMODULE DC/DC DUAL 4A 144LGA

LTM4614IV#PBF

Manufacturer Part Number
LTM4614IV#PBF
Description
IC UMODULE DC/DC DUAL 4A 144LGA
Manufacturer
Linear Technology
Series
µModuler
Type
Point of Load (POL) Non-Isolatedr
Datasheet

Specifications of LTM4614IV#PBF

Design Resources
LTM4614 Spice Model
Output
0.8 ~ 5 V
Number Of Outputs
2
Power (watts)
12W
Mounting Type
Surface Mount
Voltage - Input
2.38 ~ 5.5 V
Package / Case
144-LGA
1st Output
0.8 ~ 5 VDC @ 4A
2nd Output
0.8 ~ 5 VDC @ 4A
Size / Dimension
0.59" L x 0.59" W x 0.11" H (15mm x 15mm x 2.8mm)
Power (watts) - Rated
12W
Operating Temperature
-40°C ~ 125°C
Efficiency
95%
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
3rd Output
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LTM4614IV#PBF
Manufacturer:
LT
Quantity:
229
Company:
Part Number:
LTM4614IV#PBF
Manufacturer:
LINEAR/凌特
Quantity:
20 000
APPLICATIONS INFORMATION
Safety Considerations
The LTM4614 modules do not provide isolation from V
V
with a rating twice the maximum input current needs to be
provided to protect each unit from catastrophic failure.
Layout Checklist/Example
The high integration of LTM4614 makes the PCB board
layout very simple and easy. However, to optimize its electri-
cal and thermal performance, some layout considerations
are still necessary.
• Use large PCB copper areas for high current path,
OUT
including V
PCB conduction loss and thermal stress.
. There is no internal fuse. If required, a slow blow fuse
IN
, GND and V
GND1
GND1
GND2
GND2
OUT
V
V
IN1
IN2
. It helps to minimize the
C
C
IN2
IN1
M
L
K
H
G
D
J
F
E
C
B
A
1
Figure 11. Recommended PCB Layout
2
3
GND1
GND2
4
5
IN
I/O PINS
I/O PINS
6
to
7
8
• Place high frequency ceramic input and output capaci-
• Place a dedicated power ground layer underneath the
• To minimize the via conduction loss and reduce module
• Do not put via directly on pads unless the via is
Figure 11 gives a good example of the recommended
layout.
tors next to the V
high frequency noise.
unit.
thermal stress, use multiple vias for interconnection
between the top layer and other power layers.
capped.
9
10 11 12
GND2
V
OUT1
C
C
OUT1
OUT3
C
C
OUT2
OUT4
IN
4614 F11
, GND and V
V
GND1
V
GND2
OUT1
OUT2
OUT
LTM4614
pins to minimize
15
4614fa

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