EVAL-AD5235EBZ Analog Devices Inc, EVAL-AD5235EBZ Datasheet - Page 6

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EVAL-AD5235EBZ

Manufacturer Part Number
EVAL-AD5235EBZ
Description
BOARD EVALUATION FOR AD5235
Manufacturer
Analog Devices Inc
Datasheet

Specifications of EVAL-AD5235EBZ

Main Purpose
Digital Potentiometer
Utilized Ic / Part
AD5235
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
AD5235
INTERFACE TIMING AND EEMEM RELIABILITY CHARACTERISTICS—25 kΩ, 250 kΩ VERSIONS
Guaranteed by design and not subject to production test. See the Timing Diagrams section for the location of measured values. All input
control voltages are specified with t
measured using both V
Table 2.
Parameter
Clock Cycle Time (t
CS Setup Time
CLK Shutdown Time to CS Rise
Input Clock Pulse Width
Data Setup Time
Data Hold Time
CS to SDO-SPI Line Acquire
CS to SDO-SPI Line Release
CLK to SDO Propagation Delay
CLK to SDO Data Hold Time
CS High Pulse Width
CS High to CS High
RDY Rise to CS Fall
CS Rise to RDY Fall Time
Store EEMEM Time
Read EEMEM Time
CS Rise to Clock Rise/Fall Setup
Preset Pulse Width (Asynchronous)
Preset Response Time to Wiper Setting
Power-On EEMEM Restore Time
FLASH/EE MEMORY RELIABILITY
1
2
3
4
5
6
7
8
Typicals represent average readings at 25°C and V
Propagation delay depends on the value of V
Valid for commands that do not activate the RDY pin.
The RDY pin is low only for Instruction 2, Instruction 3, Instruction 8, Instruction 9, Instruction 10, and the PR hardware pulse: CMD_8 ~ 20 μs; CMD_9, CMD_10 ~ 7 μs;
CMD_2, CMD_3 ~ 15 ms; PR hardware pulse ~ 30 μs.
Store EEMEM time depends on the temperature and EEMEM writes cycles. Higher timing is expected at a lower temperature and higher write cycles.
Not shown in Figure 2 and Figure 3.
Endurance is qualified to 100,000 cycles per JEDEC Standard 22, Method A117 and measured at −40°C, +25°C, and +85°C.
Retention lifetime equivalent at junction temperature (T
derates with junction temperature in the Flash/EE memory.
Endurance
Data Retention
7
8
4
CYC
4, 5
3
3
)
DD
= 2.7 V and V
2
6
6
R
= t
6
DD
F
, R
DD
= 2.5 ns (10% to 90% of 3 V) and timed from a voltage level of 1.5 V. Switching characteristics are
PULL-UP
DD
= 5 V.
= 5 V.
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
1
2
3
4
6
7
8
9
10
11
12
13
14
15
16
16
17
PRW
PRESP
EEMEM
, t
, and C
J
5
) = 85°C per JEDEC Standard 22, Method A117. Retention lifetime based on an activation energy of 1 eV
L
.
Conditions
Clock level high or low
From positive CLK transition
From positive CLK transition
R
R
Applies to Instructions 0x2, 0x3
Applies to Instructions 0x8, 0x9, 0x10
PR pulsed low to refresh wiper positions
T
A
P
P
= 2.2 kΩ, C
= 2.2 kΩ, C
= 25°C
Rev. D | Page 6 of 32
L
L
< 20 pF
< 20 pF
Min
20
10
1
10
5
5
0
10
4
0
10
50
100
Typ
0.15
15
7
30
30
1
100
1
Max
40
50
50
0.3
50
30
Unit
ns
ns
t
ns
ns
ns
ns
ns
ns
ns
ns
t
ns
ms
ms
μs
ns
ns
μs
μs
MCycles
kCycles
Years
CYC
CYC

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